From: Shawn Guo <shawnguo@kernel.org>
To: Russell King <rmk+kernel@armlinux.org.uk>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org,
dann frazier <dann.frazier@canonical.com>,
Will Deacon <will.deacon@arm.com>, Li Yang <leoyang.li@nxp.com>,
Nicolin Chen <nicoleotsuka@gmail.com>,
Rob Herring <robh+dt@kernel.org>, "Y.b. Lu" <yangbo.lu@nxp.com>,
Robin Murphy <robin.murphy@arm.com>,
Christoph Hellwig <hch@lst.de>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent
Date: Mon, 7 Oct 2019 20:42:19 +0800 [thread overview]
Message-ID: <20191007124217.GO7150@dragon> (raw)
In-Reply-To: <E1iBz55-0008Mj-CX@rmk-PC.armlinux.org.uk>
On Sun, Sep 22, 2019 at 11:27:03AM +0100, Russell King wrote:
> The LX2160A esdhc controllers are setup by the driver to be DMA
> coherent, but without marking them as such in DT, Linux thinks they
> are not. This can lead to random sporadic DMA errors, even to the
> extent of preventing boot, such as:
>
> mmc0: ADMA error
> mmc0: sdhci: ============ SDHCI REGISTER DUMP ===========
> mmc0: sdhci: Sys addr: 0x00000000 | Version: 0x00002202
> mmc0: sdhci: Blk size: 0x00000008 | Blk cnt: 0x00000001
> mmc0: sdhci: Argument: 0x00000000 | Trn mode: 0x00000013
> mmc0: sdhci: Present: 0x01f50008 | Host ctl: 0x00000038
> mmc0: sdhci: Power: 0x00000003 | Blk gap: 0x00000000
> mmc0: sdhci: Wake-up: 0x00000000 | Clock: 0x000040d8
> mmc0: sdhci: Timeout: 0x00000003 | Int stat: 0x00000001
> mmc0: sdhci: Int enab: 0x037f108f | Sig enab: 0x037f108b
> mmc0: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00002202
> mmc0: sdhci: Caps: 0x35fa0000 | Caps_1: 0x0000af00
> mmc0: sdhci: Cmd: 0x0000333a | Max curr: 0x00000000
> mmc0: sdhci: Resp[0]: 0x00000920 | Resp[1]: 0x001d8a33
> mmc0: sdhci: Resp[2]: 0x325b5900 | Resp[3]: 0x3f400e00
> mmc0: sdhci: Host ctl2: 0x00000000
> mmc0: sdhci: ADMA Err: 0x00000009 | ADMA Ptr: 0x000000236d43820c
> mmc0: sdhci: ============================================
> mmc0: error -5 whilst initialising SD card
>
> These are caused by the device's descriptor fetch hitting speculatively
> loaded CPU cache lines that the CPU does not see through the normal,
> non-cacheable DMA coherent mapping that it uses for non-coherent
> devices.
>
> DT and the device must agree wrt whether the device is DMA coherent or
> not.
>
> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Applied, thanks.
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prev parent reply other threads:[~2019-10-07 12:42 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-09-22 10:23 [PATCH 0/3] Fix sdhci-of-esdhc DMA coherency Russell King - ARM Linux admin
2019-09-22 10:27 ` [PATCH 3/3] arm64: dts: mark lx2160a esdhc controllers dma coherent Russell King
2019-09-23 16:00 ` Li Yang
2019-09-23 21:26 ` Ulf Hansson
2019-09-24 3:41 ` Leo Li
2019-09-24 18:04 ` Robin Murphy
2019-09-27 18:35 ` Ulf Hansson
2019-10-07 12:42 ` Shawn Guo [this message]
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