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From: James Morse <james.morse@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>
Subject: [PATCH v2 3/3] arm64: compat: Workaround Neoverse-N1 #1542419 for compat user-space
Date: Thu, 17 Oct 2019 18:43:00 +0100	[thread overview]
Message-ID: <20191017174300.29770-4-james.morse@arm.com> (raw)
In-Reply-To: <20191017174300.29770-1-james.morse@arm.com>

Compat user-space is unable to perform ICIMVAU instructions from
user-space. Instead it uses a compat-syscall. Add the workaround for
Neoverse-N1 #1542419 to this code path.

Signed-off-by: James Morse <james.morse@arm.com>
---
 arch/arm64/kernel/sys_compat.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/kernel/sys_compat.c b/arch/arm64/kernel/sys_compat.c
index f1cb64959427..1d09160fdd25 100644
--- a/arch/arm64/kernel/sys_compat.c
+++ b/arch/arm64/kernel/sys_compat.c
@@ -8,6 +8,7 @@
  */
 
 #include <linux/compat.h>
+#include <linux/cpufeature.h>
 #include <linux/personality.h>
 #include <linux/sched.h>
 #include <linux/sched/signal.h>
@@ -17,6 +18,7 @@
 
 #include <asm/cacheflush.h>
 #include <asm/system_misc.h>
+#include <asm/tlbflush.h>
 #include <asm/unistd.h>
 
 static long
@@ -30,6 +32,15 @@ __do_compat_cache_op(unsigned long start, unsigned long end)
 		if (fatal_signal_pending(current))
 			return 0;
 
+		if (cpus_have_const_cap(ARM64_WORKAROUND_1542419)) {
+			/*
+			 * The workaround requires an inner-shareable tlbi.
+			 * We pick the reserved-ASID to minimise the impact.
+			 */
+			__tlbi(aside1is, 0);
+			dsb(ish);
+		}
+
 		ret = __flush_cache_user_range(start, start + chunk);
 		if (ret)
 			return ret;
-- 
2.20.1


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  parent reply	other threads:[~2019-10-17 17:43 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-17 17:42 [PATCH v2 0/3] arm64: errata: Workaround Neoverse-N1 #1542419 James Morse
2019-10-17 17:42 ` [PATCH v2 1/3] arm64: errata: Hide CTR_EL0.DIC on systems affected by " James Morse
2019-10-17 21:33   ` Suzuki K Poulose
2019-10-17 17:42 ` [PATCH v2 2/3] arm64: Fake the IminLine size " James Morse
2019-10-17 17:43 ` James Morse [this message]
2019-10-25 16:46 ` [PATCH v2 0/3] arm64: errata: Workaround " Catalin Marinas

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