linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Abel Vesa <abel.vesa@nxp.com>
To: Anson Huang <anson.huang@nxp.com>
Cc: "mark.rutland@arm.com" <mark.rutland@arm.com>,
	"baruch@tkos.co.il" <baruch@tkos.co.il>,
	"dafna.hirschfeld@collabora.com" <dafna.hirschfeld@collabora.com>,
	Jacky Bai <ping.bai@nxp.com>,
	"ccaione@baylibre.com" <ccaione@baylibre.com>,
	"agx@sigxcpu.org" <agx@sigxcpu.org>,
	"angus@akkea.ca" <angus@akkea.ca>, Peng Fan <peng.fan@nxp.com>,
	Gary Bisson <gary.bisson@boundarydevices.com>,
	"pavel@ucw.cz" <pavel@ucw.cz>,
	"manivannan.sadhasivam@linaro.org"
	<manivannan.sadhasivam@linaro.org>,
	Leonard Crestez <leonard.crestez@nxp.com>,
	"festevam@gmail.com" <festevam@gmail.com>,
	Richard Hu <richard.hu@technexion.com>,
	"andrew.smirnov@gmail.com" <andrew.smirnov@gmail.com>,
	"daniel.lezcano@linaro.org" <daniel.lezcano@linaro.org>,
	"jon@solid-run.com" <jon@solid-run.com>,
	dl-linux-imx <linux-imx@nxp.com>,
	"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	"andradanciu1997@gmail.com" <andradanciu1997@gmail.com>,
	"s.hauer@pengutronix.de" <s.hauer@pengutronix.de>,
	Troy Kisky <troy.kisky@boundarydevices.com>,
	"robh+dt@kernel.org" <robh+dt@kernel.org>,
	Daniel Baluta <daniel.baluta@nxp.com>,
	"linux-arm-kernel@lists.infradead.org"
	<linux-arm-kernel@lists.infradead.org>,
	Aisheng Dong <aisheng.dong@nxp.com>,
	Andy Duan <fugang.duan@nxp.com>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"kernel@pengutronix.de" <kernel@pengutronix.de>,
	Jun Li <jun.li@nxp.com>,
	"shawnguo@kernel.org" <shawnguo@kernel.org>,
	"l.stach@pengutronix.de" <l.stach@pengutronix.de>
Subject: Re: [PATCH 1/5] arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT
Date: Sun, 20 Oct 2019 14:35:46 +0000	[thread overview]
Message-ID: <20191020143545.we56f4epnbgjr5lw@fsr-ub1664-175> (raw)
In-Reply-To: <1571192067-19600-1-git-send-email-Anson.Huang@nxp.com>

On 19-10-16 10:14:23, Anson Huang wrote:
> usdhc's clock rate is different according to different devices
> connected, so clock rate assignment should be placed in board
> DT according to different devices connected on each usdhc port.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>

For the entire patchset:

Reviewed-by: Abel Vesa <abel.vesa@nxp.com>

> ---
>  arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts | 4 ++++
>  arch/arm64/boot/dts/freescale/imx8qxp-mek.dts   | 4 ++++
>  arch/arm64/boot/dts/freescale/imx8qxp.dtsi      | 6 ------
>  3 files changed, 8 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts b/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts
> index 91eef97..a3f8cf1 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-ai_ml.dts
> @@ -133,6 +133,8 @@
>  &usdhc1 {
>  	#address-cells = <1>;
>  	#size-cells = <0>;
> +	assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> +	assigned-clock-rates = <200000000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_usdhc1>;
>  	bus-width = <4>;
> @@ -149,6 +151,8 @@
>  
>  /* SD */
>  &usdhc2 {
> +	assigned-clocks = <&clk IMX_CONN_SDHC1_CLK>;
> +	assigned-clock-rates = <200000000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_usdhc2>;
>  	bus-width = <4>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> index 88dd9132..d3d26cc 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> @@ -137,6 +137,8 @@
>  };
>  
>  &usdhc1 {
> +	assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> +	assigned-clock-rates = <200000000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_usdhc1>;
>  	bus-width = <8>;
> @@ -147,6 +149,8 @@
>  };
>  
>  &usdhc2 {
> +	assigned-clocks = <&clk IMX_CONN_SDHC1_CLK>;
> +	assigned-clock-rates = <200000000>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_usdhc2>;
>  	bus-width = <4>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> index 2d69f1a..9646a41 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
> @@ -368,8 +368,6 @@
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_PER_CLK>,
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC0_HCLK>;
>  			clock-names = "ipg", "per", "ahb";
> -			assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> -			assigned-clock-rates = <200000000>;
>  			power-domains = <&pd IMX_SC_R_SDHC_0>;
>  			status = "disabled";
>  		};
> @@ -383,8 +381,6 @@
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_PER_CLK>,
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC1_HCLK>;
>  			clock-names = "ipg", "per", "ahb";
> -			assigned-clocks = <&clk IMX_CONN_SDHC1_CLK>;
> -			assigned-clock-rates = <200000000>;
>  			power-domains = <&pd IMX_SC_R_SDHC_1>;
>  			fsl,tuning-start-tap = <20>;
>  			fsl,tuning-step= <2>;
> @@ -400,8 +396,6 @@
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_PER_CLK>,
>  				 <&conn_lpcg IMX_CONN_LPCG_SDHC2_HCLK>;
>  			clock-names = "ipg", "per", "ahb";
> -			assigned-clocks = <&clk IMX_CONN_SDHC2_CLK>;
> -			assigned-clock-rates = <200000000>;
>  			power-domains = <&pd IMX_SC_R_SDHC_2>;
>  			status = "disabled";
>  		};
> -- 
> 2.7.4
> 

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2019-10-20 14:36 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-16  2:14 [PATCH 1/5] arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT Anson Huang
2019-10-16  2:14 ` [PATCH 2/5] arm64: dts: imx8mq: " Anson Huang
2019-10-16  2:14 ` [PATCH 3/5] arm64: dts: imx8mm: " Anson Huang
2019-10-16  2:14 ` [PATCH 4/5] arm64: dts: imx8mn: " Anson Huang
2019-10-16  2:14 ` [PATCH 5/5] ARM: dts: imx7ulp: " Anson Huang
2019-10-20 14:35 ` Abel Vesa [this message]
2019-10-26 12:09 ` [PATCH 1/5] arm64: dts: imx8qxp: " Shawn Guo
2019-10-28  1:29   ` Anson Huang
2019-10-28  3:15     ` Shawn Guo

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20191020143545.we56f4epnbgjr5lw@fsr-ub1664-175 \
    --to=abel.vesa@nxp.com \
    --cc=agx@sigxcpu.org \
    --cc=aisheng.dong@nxp.com \
    --cc=andradanciu1997@gmail.com \
    --cc=andrew.smirnov@gmail.com \
    --cc=angus@akkea.ca \
    --cc=anson.huang@nxp.com \
    --cc=baruch@tkos.co.il \
    --cc=ccaione@baylibre.com \
    --cc=dafna.hirschfeld@collabora.com \
    --cc=daniel.baluta@nxp.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=festevam@gmail.com \
    --cc=fugang.duan@nxp.com \
    --cc=gary.bisson@boundarydevices.com \
    --cc=jon@solid-run.com \
    --cc=jun.li@nxp.com \
    --cc=kernel@pengutronix.de \
    --cc=l.stach@pengutronix.de \
    --cc=leonard.crestez@nxp.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-imx@nxp.com \
    --cc=linux-kernel@vger.kernel.org \
    --cc=manivannan.sadhasivam@linaro.org \
    --cc=mark.rutland@arm.com \
    --cc=pavel@ucw.cz \
    --cc=peng.fan@nxp.com \
    --cc=ping.bai@nxp.com \
    --cc=richard.hu@technexion.com \
    --cc=robh+dt@kernel.org \
    --cc=s.hauer@pengutronix.de \
    --cc=shawnguo@kernel.org \
    --cc=troy.kisky@boundarydevices.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).