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From: Mark Brown <broonie@kernel.org>
To: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Naga Sureshkumar Relli <naga.sureshkumar.relli@xilinx.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Michal Simek <michal.simek@xilinx.com>,
	linux-spi@vger.kernel.org, Mark Brown <broonie@kernel.org>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	linux-arm-kernel@lists.infradead.org
Subject: Applied "spi: zynq-qspi: Do the actual hardware initialization later in the probe" to the spi tree
Date: Fri,  8 Nov 2019 17:45:43 +0000 (GMT)	[thread overview]
Message-ID: <20191108174543.40D712741702@ypsilon.sirena.org.uk> (raw)
In-Reply-To: <20191108140744.1734-7-miquel.raynal@bootlin.com>

The patch

   spi: zynq-qspi: Do the actual hardware initialization later in the probe

has been applied to the spi tree at

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-5.5

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark

From 8f16292d8b492ca6b0d58ac0769de1c1a7bbb544 Mon Sep 17 00:00:00 2001
From: Miquel Raynal <miquel.raynal@bootlin.com>
Date: Fri, 8 Nov 2019 15:07:43 +0100
Subject: [PATCH] spi: zynq-qspi: Do the actual hardware initialization later
 in the probe

Supporting more than one CS will need some tweaking of the linear
configuration register which is (rightfully) initialized in the
hardware initialization helper. The extra initialization needs the
knowledge of the actual number of CS, which is retrieved by reading
the value of the num-cs DT property.

As the initialization helper is called pretty early and might be
called much later in the probe without side effect, let's delay it a
bit so that the number of CS will be available when running this
helper. This way, adding support for multiple CS lines in a next patch
will be eased.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20191108140744.1734-7-miquel.raynal@bootlin.com
Signed-off-by: Mark Brown <broonie@kernel.org>
---
 drivers/spi/spi-zynq-qspi.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/spi/spi-zynq-qspi.c b/drivers/spi/spi-zynq-qspi.c
index 80e51c894eaa..e76f9c9738f0 100644
--- a/drivers/spi/spi-zynq-qspi.c
+++ b/drivers/spi/spi-zynq-qspi.c
@@ -657,9 +657,6 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 		goto clk_dis_pclk;
 	}
 
-	/* QSPI controller initializations */
-	zynq_qspi_init_hw(xqspi);
-
 	xqspi->irq = platform_get_irq(pdev, 0);
 	if (xqspi->irq <= 0) {
 		ret = -ENXIO;
@@ -690,6 +687,10 @@ static int zynq_qspi_probe(struct platform_device *pdev)
 	ctlr->setup = zynq_qspi_setup_op;
 	ctlr->max_speed_hz = clk_get_rate(xqspi->refclk) / 2;
 	ctlr->dev.of_node = np;
+
+	/* QSPI controller initializations */
+	zynq_qspi_init_hw(xqspi);
+
 	ret = devm_spi_register_controller(&pdev->dev, ctlr);
 	if (ret) {
 		dev_err(&pdev->dev, "spi_register_master failed\n");
-- 
2.20.1


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  reply	other threads:[~2019-11-08 17:46 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-08 14:07 [PATCH v2 0/7] spi: zynq-qspi: Clarify and fix the chip selection Miquel Raynal
2019-11-08 14:07 ` [PATCH v2 1/7] spi: zynq-qspi: Anything else than CS0 is not supported yet Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Anything else than CS0 is not supported yet" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 2/7] spi: zynq-qspi: Keep the naming consistent across the driver Miquel Raynal
2019-11-08 14:07 ` [PATCH v2 3/7] spi: zynq-qspi: Keep the bitfields naming consistent Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Keep the bitfields naming consistent" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 4/7] spi: zynq-qspi: Enhance the Linear CFG bit definitions Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Enhance the Linear CFG bit definitions" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 5/7] spi: zynq-qspi: Clarify the select chip function Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Clarify the select chip function" to the spi tree Mark Brown
2019-11-08 14:07 ` [PATCH v2 6/7] spi: zynq-qspi: Do the actual hardware initialization later in the probe Miquel Raynal
2019-11-08 17:45   ` Mark Brown [this message]
2019-11-08 14:07 ` [PATCH v2 7/7] spi: zynq-qspi: Support two chip selects Miquel Raynal
2019-11-08 17:45   ` Applied "spi: zynq-qspi: Support two chip selects" to the spi tree Mark Brown

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