tree: https://github.com/Xilinx/linux-xlnx master head: 2320db49769e9480e68b5546b8f3c251c01c082d commit: 31d7800cc8d815f78d1bfa30655799f5733a4f59 [20/144] usb: dwc3: Add support for masking phy reset signal config: i386-randconfig-g003-201944 (attached as .config) compiler: gcc-7 (Debian 7.4.0-14) 7.4.0 reproduce: git checkout 31d7800cc8d815f78d1bfa30655799f5733a4f59 # save the attached .config to linux build tree make ARCH=i386 If you fix the issue, kindly add following tag Reported-by: kbuild test robot All errors (new ones prefixed by >>): ld: drivers/spi/spi-mem.o: in function `spi_mem_exec_op': drivers/spi/spi-mem.c:343: undefined reference to `update_stripe' ld: drivers/usb/dwc3/core.o: in function `dwc3_suspend_common': drivers/usb/dwc3/core.c:1790: undefined reference to `dwc3_set_usb_core_power' ld: drivers/usb/dwc3/core.o: in function `dwc3_core_init': >> drivers/usb/dwc3/core.c:1006: undefined reference to `dwc3_mask_phy_reset' ld: drivers/usb/dwc3/core.o: in function `dwc3_config_soc_bus': drivers/usb/dwc3/core.c:593: undefined reference to `dwc3_set_simple_data' ld: drivers/usb/dwc3/core.c:585: undefined reference to `dwc3_enable_hw_coherency' ld: drivers/usb/dwc3/core.o: in function `dwc3_resume_common': drivers/usb/dwc3/core.c:1809: undefined reference to `dwc3_set_usb_core_power' ld: drivers/usb/dwc3/core.o: in function `dwc3_get_properties': drivers/usb/dwc3/core.c:1456: undefined reference to `dwc3_simple_check_quirks' ld: drivers/usb/dwc3/host.o: in function `dwc3_host_wakeup_capable': drivers/usb/dwc3/host.c:18: undefined reference to `dwc3_simple_wakeup_capable' vim +1006 drivers/usb/dwc3/core.c 952 953 /** 954 * dwc3_core_init - Low-level initialization of DWC3 Core 955 * @dwc: Pointer to our controller context structure 956 * 957 * Returns 0 on success otherwise negative errno. 958 */ 959 int dwc3_core_init(struct dwc3 *dwc) 960 { 961 u32 reg; 962 int ret; 963 964 if (!dwc3_core_is_valid(dwc)) { 965 dev_err(dwc->dev, "this is not a DesignWare USB3 DRD Core\n"); 966 ret = -ENODEV; 967 goto err0; 968 } 969 970 /* 971 * Write Linux Version Code to our GUID register so it's easy to figure 972 * out which kernel version a bug was found. 973 */ 974 dwc3_writel(dwc->regs, DWC3_GUID, LINUX_VERSION_CODE); 975 976 /* Handle USB2.0-only core configuration */ 977 if (DWC3_GHWPARAMS3_SSPHY_IFC(dwc->hwparams.hwparams3) == 978 DWC3_GHWPARAMS3_SSPHY_IFC_DIS) { 979 if (dwc->maximum_speed == USB_SPEED_SUPER) 980 dwc->maximum_speed = USB_SPEED_HIGH; 981 } 982 983 ret = dwc3_phy_setup(dwc); 984 if (ret) 985 goto err0; 986 987 if (!dwc->ulpi_ready) { 988 ret = dwc3_core_ulpi_init(dwc); 989 if (ret) 990 goto err0; 991 dwc->ulpi_ready = true; 992 } 993 994 if (!dwc->phys_ready) { 995 ret = dwc3_core_get_phy(dwc); 996 if (ret) 997 goto err0a; 998 dwc->phys_ready = true; 999 } 1000 1001 ret = dwc3_core_soft_reset(dwc); 1002 if (ret) 1003 goto err0a; 1004 1005 if (dwc->mask_phy_rst) > 1006 dwc3_mask_phy_reset(dwc->dev, TRUE); 1007 1008 dwc3_core_setup_global_control(dwc); 1009 dwc3_core_num_eps(dwc); 1010 1011 if (dwc->scratchbuf == NULL) { 1012 ret = dwc3_alloc_scratch_buffers(dwc); 1013 if (ret) { 1014 dev_err(dwc->dev, 1015 "Not enough memory for scratch buffers\n"); 1016 goto err1; 1017 } 1018 } 1019 1020 ret = dwc3_setup_scratch_buffers(dwc); 1021 if (ret) { 1022 dev_err(dwc->dev, "Failed to setup scratch buffers: %d\n", ret); 1023 goto err1; 1024 } 1025 1026 /* Adjust Frame Length */ 1027 dwc3_frame_length_adjustment(dwc); 1028 1029 dwc3_set_incr_burst_type(dwc); 1030 1031 ret = dwc3_config_soc_bus(dwc); 1032 if (ret) 1033 goto err1; 1034 1035 usb_phy_set_suspend(dwc->usb2_phy, 0); 1036 usb_phy_set_suspend(dwc->usb3_phy, 0); 1037 ret = phy_power_on(dwc->usb2_generic_phy); 1038 if (ret < 0) 1039 goto err2; 1040 1041 ret = phy_power_on(dwc->usb3_generic_phy); 1042 if (ret < 0) 1043 goto err3; 1044 1045 ret = dwc3_event_buffers_setup(dwc); 1046 if (ret) { 1047 dev_err(dwc->dev, "failed to setup event buffers\n"); 1048 goto err4; 1049 } 1050 1051 switch (dwc->dr_mode) { 1052 case USB_DR_MODE_PERIPHERAL: 1053 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_DEVICE); 1054 break; 1055 case USB_DR_MODE_HOST: 1056 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_HOST); 1057 break; 1058 case USB_DR_MODE_OTG: 1059 dwc3_set_prtcap(dwc, DWC3_GCTL_PRTCAP_OTG); 1060 break; 1061 default: 1062 dev_warn(dwc->dev, "Unsupported mode %d\n", dwc->dr_mode); 1063 break; 1064 } 1065 1066 /* 1067 * ENDXFER polling is available on version 3.10a and later of 1068 * the DWC_usb3 controller. It is NOT available in the 1069 * DWC_usb31 controller. 1070 */ 1071 if (!dwc3_is_usb31(dwc) && dwc->revision >= DWC3_REVISION_310A) { 1072 reg = dwc3_readl(dwc->regs, DWC3_GUCTL2); 1073 reg |= DWC3_GUCTL2_RST_ACTBITLATER; 1074 dwc3_writel(dwc->regs, DWC3_GUCTL2, reg); 1075 } 1076 1077 /* When configured in HOST mode, after issuing U3/L2 exit controller 1078 * fails to send proper CRC checksum in CRC5 feild. Because of this 1079 * behaviour Transaction Error is generated, resulting in reset and 1080 * re-enumeration of usb device attached. Enabling bit 10 of GUCTL1 1081 * will correct this problem 1082 */ 1083 if (dwc->enable_guctl1_resume_quirk) { 1084 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 1085 reg |= DWC3_GUCTL1_RESUME_QUIRK; 1086 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1087 } 1088 1089 /* SNPS controller when configureed in HOST mode maintains Inter Packet 1090 * Delay (IPD) of ~380ns which works with most of the super-speed hubs 1091 * except VIA-LAB hubs. When IPD is ~380ns HOST controller fails to 1092 * enumerate FS/LS devices when connected behind VIA-LAB hubs. 1093 * Enabling bit 9 of GUCTL1 enables the workaround in HW to reduce the 1094 * ULPI clock latency by 1 cycle, thus reducing the IPD (~360ns) and 1095 * making controller enumerate FS/LS devices connected behind VIA-LAB. 1096 */ 1097 if (dwc->enable_guctl1_ipd_quirk) { 1098 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 1099 reg |= DWC3_GUCTL1_IPD_QUIRK; 1100 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1101 } 1102 1103 if (dwc->revision >= DWC3_REVISION_250A) { 1104 reg = dwc3_readl(dwc->regs, DWC3_GUCTL1); 1105 1106 /* 1107 * Enable hardware control of sending remote wakeup 1108 * in HS when the device is in the L1 state. 1109 */ 1110 if (dwc->revision >= DWC3_REVISION_290A) 1111 reg |= DWC3_GUCTL1_DEV_L1_EXIT_BY_HW; 1112 1113 if (dwc->dis_tx_ipgap_linecheck_quirk) 1114 reg |= DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS; 1115 1116 dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); 1117 } 1118 1119 if (dwc->dr_mode == USB_DR_MODE_HOST || 1120 dwc->dr_mode == USB_DR_MODE_OTG) { 1121 reg = dwc3_readl(dwc->regs, DWC3_GUCTL); 1122 1123 /* 1124 * Enable Auto retry Feature to make the controller operating in 1125 * Host mode on seeing transaction errors(CRC errors or internal 1126 * overrun scenerios) on IN transfers to reply to the device 1127 * with a non-terminating retry ACK (i.e, an ACK transcation 1128 * packet with Retry=1 & Nump != 0) 1129 */ 1130 reg |= DWC3_GUCTL_HSTINAUTORETRY; 1131 1132 dwc3_writel(dwc->regs, DWC3_GUCTL, reg); 1133 } 1134 1135 /* 1136 * Must config both number of packets and max burst settings to enable 1137 * RX and/or TX threshold. 1138 */ 1139 if (dwc3_is_usb31(dwc) && dwc->dr_mode == USB_DR_MODE_HOST) { 1140 u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; 1141 u8 rx_maxburst = dwc->rx_max_burst_prd; 1142 u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; 1143 u8 tx_maxburst = dwc->tx_max_burst_prd; 1144 1145 if (rx_thr_num && rx_maxburst) { 1146 reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); 1147 reg |= DWC31_RXTHRNUMPKTSEL_PRD; 1148 1149 reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); 1150 reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); 1151 1152 reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); 1153 reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); 1154 1155 dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); 1156 } 1157 1158 if (tx_thr_num && tx_maxburst) { 1159 reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); 1160 reg |= DWC31_TXTHRNUMPKTSEL_PRD; 1161 1162 reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); 1163 reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); 1164 1165 reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); 1166 reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); 1167 1168 dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); 1169 } 1170 } 1171 1172 return 0; 1173 1174 err4: 1175 phy_power_off(dwc->usb3_generic_phy); 1176 1177 err3: 1178 phy_power_off(dwc->usb2_generic_phy); 1179 1180 err2: 1181 usb_phy_set_suspend(dwc->usb2_phy, 1); 1182 usb_phy_set_suspend(dwc->usb3_phy, 1); 1183 1184 err1: 1185 usb_phy_shutdown(dwc->usb2_phy); 1186 usb_phy_shutdown(dwc->usb3_phy); 1187 phy_exit(dwc->usb2_generic_phy); 1188 phy_exit(dwc->usb3_generic_phy); 1189 1190 err0a: 1191 dwc3_ulpi_exit(dwc); 1192 1193 err0: 1194 return ret; 1195 } 1196 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation