From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.3 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CAFCBC432C3 for ; Fri, 15 Nov 2019 15:21:02 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 91A8920733 for ; Fri, 15 Nov 2019 15:21:02 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="VsAX5rLn" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 91A8920733 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References: Message-ID:Subject:To:From:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=t5C8jdxaGO2DU7SKilIHqDnqqKH/0kAgfoAIkCI5jBM=; b=VsAX5rLngWZS1s XKEIKTwVxo6WfUmNZ4AK8HNm/qx1gooFCJB5qw6bKyuRAcFIXkRrMlS2hfN1k3Q0hug2fx2vlbSIM gY65WNFndgufmsM3KTmTlON5h/hrVBXzvAkZ2GMhHcYJWJlFm9W5nYhDD+tNO6kuQ0tPPYJhnVVkd TxAb3N/2kujy3C3GApPvFt5z39cMwxMjUEut5P+phinXC0JgoTigEE0Gg97f//mmqDymL9atUPRqh 0qu+gZxfI//hjkDpY5+yl5ThhNX+C9KtFznRWeob4j9YJEiu0nKHyMnjm3JO6KRws4xyTxI6KfNtL PqQ7fWNcLw1ec1ShwXOA==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iVdPA-00067K-KT; Fri, 15 Nov 2019 15:21:00 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iVdP7-00065o-F4 for linux-arm-kernel@lists.infradead.org; Fri, 15 Nov 2019 15:20:58 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 67E7130E; Fri, 15 Nov 2019 07:20:52 -0800 (PST) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 18AF43F534; Fri, 15 Nov 2019 07:20:49 -0800 (PST) Date: Fri, 15 Nov 2019 15:20:48 +0000 From: Mark Rutland To: Sami Tolvanen Subject: Re: [PATCH v5 14/14] arm64: implement Shadow Call Stack Message-ID: <20191115152047.GI41572@lakrids.cambridge.arm.com> References: <20191018161033.261971-1-samitolvanen@google.com> <20191105235608.107702-1-samitolvanen@google.com> <20191105235608.107702-15-samitolvanen@google.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20191105235608.107702-15-samitolvanen@google.com> User-Agent: Mutt/1.11.1+11 (2f07cb52) (2018-12-01) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191115_072057_549390_BEECE0B5 X-CRM114-Status: GOOD ( 11.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kees Cook , Ard Biesheuvel , Masahiro Yamada , Catalin Marinas , Jann Horn , Nick Desaulniers , linux-kernel@vger.kernel.org, Steven Rostedt , Miguel Ojeda , clang-built-linux@googlegroups.com, Masami Hiramatsu , Marc Zyngier , kernel-hardening@lists.openwall.com, Laura Abbott , Will Deacon , Dave Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Nov 05, 2019 at 03:56:08PM -0800, Sami Tolvanen wrote: > This change implements shadow stack switching, initial SCS set-up, > and interrupt shadow stacks for arm64. Each CPU also has an overflow stack, and two SDEI stacks, which should presumably be given their own SCS. SDEI is effectively a software-NMI, so it should almost certainly have the same treatement as IRQ. > +static __always_inline void scs_save(struct task_struct *tsk) > +{ > + void *s; > + > + asm volatile("mov %0, x18" : "=r" (s)); > + task_set_scs(tsk, s); > +} An alternative would be to follow , and have: register unsigned long *current_scs_pointer asm ("x18"); static __always_inline void scs_save(struct task_struct *tsk) { task_set_scs(tsk, current_scs_pointer); } ... which would avoid the need for a temporary register where this is used. However, given we only use this in cpu_die(), having this as-is should be fine. Maybe the asm volatile is preferable if we use this elsewhere, so that we know we have a consistent snapshot that the compiler can't reload, etc. [...] > @@ -409,6 +428,10 @@ alternative_insn eret, nop, ARM64_UNMAP_KERNEL_AT_EL0 > */ > .macro irq_stack_exit > mov sp, x19 > +#ifdef CONFIG_SHADOW_CALL_STACK > + /* x20 is also preserved */ > + mov x18, x20 > +#endif > .endm Can we please fold this comment into the one above, and have: /* * The callee-saved regs (x19-x29) should be preserved between * irq_stack_entry and irq_stack_exit. */ .macro irq_stack_exit mov sp, x19 #ifdef CONFIG_SHADOW_CALL_STACK mov x18, x20 #endif .endm Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel