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Mon, 09 Dec 2019 01:31:32 -0800 (PST) Received: from udknight.localhost (localhost [127.0.0.1]) by udknight.localhost (8.14.9/8.14.4) with ESMTP id xB99IlBX003828; Mon, 9 Dec 2019 17:18:47 +0800 Received: (from root@localhost) by udknight.localhost (8.14.9/8.14.9/Submit) id xB99IfJA003808; Mon, 9 Dec 2019 17:18:41 +0800 Date: Mon, 9 Dec 2019 17:18:41 +0800 From: Wang YanQing To: Robin Murphy Subject: Re: perf record doesn't work on rtd129x SoC Message-ID: <20191209091841.GA3703@udknight> Mail-Followup-To: Wang YanQing , Robin Murphy , Andreas =?iso-8859-1?Q?F=E4rber?= , Mark Rutland , linux-realtek-soc@lists.infradead.org, Will Deacon , linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, "linux-arm-kernel@lists.infradead.org" References: <20191204045559.GA10458@udknight> <1b2d2bc3-afcf-02c3-ccd6-e2a227c23fd3@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.7.1 (2016-10-04) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191209_013135_120018_6F9EC352 X-CRM114-Status: GOOD ( 21.98 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-realtek-soc@lists.infradead.org, Will Deacon , linux-kernel@vger.kernel.org, linux-soc@vger.kernel.org, Andreas =?iso-8859-1?Q?F=E4rber?= , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Dec 04, 2019 at 02:51:24PM +0000, Robin Murphy wrote: > On 04/12/2019 11:20 am, Robin Murphy wrote: > > On 2019-12-04 7:28 am, Andreas F=E4rber wrote: > >> Hi YanQing, > >> > >> + LAKML + Mark + Will > >> > >> Am 04.12.19 um 05:55 schrieb Wang YanQing: > >>> I use "perf record" to debug performance issue on RTD1296 SOC, it = > >>> does't work, but > >>> the "perf stat" is ok! > >> > >> Thanks for the report - which board, branch and (base) tag are you > >> testing against? And are you building perf yourself from kernel source= s, > >> or are you using some distro package? > >> > >> I only have Busybox in my initrd on DS418; I have not tested perf. > >> > >>> After some dig in the kernel, I find the reason is no pmu overflow = > >>> interrupt, I think > >>> below pmu configuration isn't right for RTD1296: > >>> " > >>> =A0=A0=A0=A0=A0=A0=A0=A0 arm_pmu: arm-pmu { > >>> =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 compatible =3D "arm,= cortex-a53-pmu"; > >>> =A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 interrupts =3D ; > >>> =A0=A0=A0=A0=A0=A0=A0=A0 }; > >>> " > >>> > >>> We need 4 PMU SPI for RTD1296 (4 cores), and I guess the 48 isn't = > >>> right too. > >> > >> Note that above rtd129x.dtsi snippet is not complete. See rtd1296.dtsi: > >> > >> &arm_pmu { > >> =A0=A0=A0=A0interrupt-affinity =3D <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; > >> }; > > = > > That doesn't help much, since 4 affinities for one SPI is rather = > > nonsensical. > > = > >> 48 and high/4 match what I see in the latest BSP: > >> > >> https://github.com/BPI-SINOVOIP/BPI-M4-bsp/blob/master/linux-rtk/arch/= arm64/boot/dts/realtek/rtd129x/rtd-1296.dtsi#L116 = > >> > >> > >>> Any suggestion is welcome. > >>> > >>> Thanks! > >> > >> The only difference I see is "arm,cortex-a53-pmu" vs. "arm,armv8-pmuv3= ". > >> By my reading of arch/arm64/kernel/perf_event.c the only difference > >> between the two should be the name and an extra cache_map. You could t= ry > >> the other compatible string in your .dts, but I doubt it'll help. > >> > >> Hopefully the Realtek or Arm guys can shed some light. > > = > > If the SoC really has all 4 overflow interrupts combined into a single = > > SPI line, then sampling just isn't going to be supported - it's = > > unreasonably difficult to handle overflow when the IRQ may be taken on = > > the wrong CPU. > = > On closer inspection, that BSP kernel implements a whole hrtimer-based = > bodge in arm_pmu to apparently work around not having usable interrupts, = > so yeah, this isn't going to be usable, sorry. > = > Robin. Hi all! Thanks for all suggestions and inspection, if we make sure it is a hardware design blunder, then it is accpetable for me, I just need to make sure it isn't the kernel's fault, if so that's will be our fault:) Thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel