From: Julien Thierry <jthierry@redhat.com>
To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Cc: Julien Thierry <jthierry@redhat.com>,
peterz@infradead.org, catalin.marinas@arm.com,
raphael.gault@arm.com, jpoimboe@redhat.com, will@kernel.org
Subject: [RFC v5 32/57] objtool: arm64: Decode load/store register pair instructions
Date: Thu, 9 Jan 2020 16:02:35 +0000 [thread overview]
Message-ID: <20200109160300.26150-33-jthierry@redhat.com> (raw)
In-Reply-To: <20200109160300.26150-1-jthierry@redhat.com>
Decode load/store instruction to a pair of registers. Split the
instruction into two stack operations, one for each register.
Suggested-by: Raphael Gault <raphael.gault@arm.com>
Signed-off-by: Julien Thierry <jthierry@redhat.com>
---
tools/objtool/arch/arm64/decode.c | 220 ++++++++++++++++++
.../objtool/arch/arm64/include/insn_decode.h | 12 +
2 files changed, 232 insertions(+)
diff --git a/tools/objtool/arch/arm64/decode.c b/tools/objtool/arch/arm64/decode.c
index 00d5d627af08..2aaac4e3786c 100644
--- a/tools/objtool/arch/arm64/decode.c
+++ b/tools/objtool/arch/arm64/decode.c
@@ -810,6 +810,26 @@ int arm_decode_br_uncond_reg(u32 instr, enum insn_type *type,
#undef INSN_DRPS_MASK
static struct aarch64_insn_decoder ld_st_decoder[] = {
+ {
+ .mask = 0b001101100000000,
+ .value = 0b001000000000000,
+ .decode_func = arm_decode_ld_st_noalloc_pair_off,
+ },
+ {
+ .mask = 0b001101100000000,
+ .value = 0b001000100000000,
+ .decode_func = arm_decode_ld_st_regs_pair_post,
+ },
+ {
+ .mask = 0b001101100000000,
+ .value = 0b001001000000000,
+ .decode_func = arm_decode_ld_st_regs_pair_off,
+ },
+ {
+ .mask = 0b001101100000000,
+ .value = 0b001001100000000,
+ .decode_func = arm_decode_ld_st_regs_pair_pre,
+ },
{
.mask = 0b001101010000011,
.value = 0b001100000000000,
@@ -1234,3 +1254,203 @@ int arm_decode_ld_st_regs_off(u32 instr, enum insn_type *type,
return 0;
}
+
+int arm_decode_ld_st_noalloc_pair_off(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ unsigned char opc = 0, V = 0, L = 0;
+ unsigned char decode_field = 0;
+
+ opc = (instr >> 30) & ONES(2);
+ V = EXTRACT_BIT(instr, 26);
+ L = EXTRACT_BIT(instr, 22);
+
+ decode_field = (opc << 2) | (V << 1) | L;
+
+ if (decode_field == 0x4 ||
+ decode_field == 0x5 ||
+ decode_field >= 12) {
+ return arm_decode_unknown(instr, type, immediate, ops_list);
+ }
+ return arm_decode_ld_st_regs_pair_off(instr, type, immediate, ops_list);
+}
+
+int arm_decode_ld_st_regs_pair_off(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ unsigned char opc = 0, V = 0, L = 0, bit = 0;
+ unsigned char imm7 = 0, rt2 = 0, rt = 0, rn = 0;
+ unsigned char decode_field = 0;
+ struct stack_op *op;
+ int scale = 0;
+
+ opc = (instr >> 30) & ONES(2);
+ V = EXTRACT_BIT(instr, 26);
+ L = EXTRACT_BIT(instr, 22);
+ imm7 = (instr >> 15) & ONES(7);
+ rt2 = (instr >> 10) & ONES(5);
+ rn = (instr >> 5) & ONES(5);
+ rt = instr & ONES(5);
+ bit = EXTRACT_BIT(opc, 1);
+ scale = 2 + bit;
+
+ decode_field = (opc << 2) | (V << 1) | L;
+
+ if (decode_field >= 0xC)
+ return arm_decode_unknown(instr, type, immediate, ops_list);
+
+ *immediate = (SIGN_EXTEND(imm7, 7)) << scale;
+
+ if (!stack_related_reg(rn)) {
+ *type = INSN_OTHER;
+ return 0;
+ }
+
+ *type = INSN_STACK;
+
+ op = calloc(1, sizeof(*op));
+ list_add_tail(&op->list, ops_list);
+ switch (decode_field) {
+ case 1:
+ case 3:
+ case 5:
+ case 7:
+ case 9:
+ case 11:
+ /* load */
+ op->src.type = OP_SRC_REG_INDIRECT;
+ op->src.reg = rn;
+ op->src.offset = *immediate;
+ op->dest.type = OP_DEST_REG;
+ op->dest.reg = rt;
+ op->dest.offset = 0;
+ {
+ struct stack_op *extra;
+
+ extra = malloc(sizeof(*extra));
+ extra->src.type = OP_SRC_REG_INDIRECT;
+ extra->src.reg = rn;
+ extra->src.offset = (int)*immediate + 8;
+ extra->dest.type = OP_DEST_REG;
+ extra->dest.reg = rt2;
+ extra->dest.offset = 0;
+
+ list_add_tail(&extra->list, ops_list);
+ }
+ break;
+ default:
+ op->dest.type = OP_DEST_REG_INDIRECT;
+ op->dest.reg = rn;
+ op->dest.offset = (int)*immediate + 8;
+ op->src.type = OP_SRC_REG;
+ op->src.reg = rt2;
+ op->src.offset = 0;
+ {
+ struct stack_op *extra;
+
+ extra = malloc(sizeof(*extra));
+ extra->dest.type = OP_DEST_REG_INDIRECT;
+ extra->dest.reg = rn;
+ extra->dest.offset = *immediate;
+ extra->src.type = OP_SRC_REG;
+ extra->src.reg = rt;
+ extra->src.offset = 0;
+
+ list_add_tail(&extra->list, ops_list);
+ }
+ /* store */
+ }
+ return 0;
+}
+
+int arm_decode_ld_st_regs_pair_post(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ int ret = 0;
+ unsigned int base_reg;
+ bool base_is_src;
+ struct stack_op *op;
+ struct stack_op *post_inc;
+
+ ret = arm_decode_ld_st_regs_pair_off(instr, type, immediate, ops_list);
+ if (ret < 0 || *type == INSN_OTHER)
+ return ret;
+
+ op = list_first_entry(ops_list, typeof(*op), list);
+ if (op->dest.type == OP_DEST_REG_INDIRECT) {
+ base_reg = op->dest.reg;
+ base_is_src = false;
+ } else if (op->src.type == OP_SRC_REG_INDIRECT) {
+ base_reg = op->src.reg;
+ base_is_src = true;
+ } else {
+ WARN("Unexpected base type");
+ return -1;
+ }
+
+ post_inc = malloc(sizeof(*post_inc));
+ post_inc->dest.type = OP_DEST_REG;
+ post_inc->dest.reg = base_reg;
+ post_inc->src.reg = base_reg;
+ post_inc->src.type = OP_SRC_ADD;
+ post_inc->src.offset = (int)*immediate;
+
+ /* Adapt offsets */
+ list_for_each_entry(op, ops_list, list) {
+ if (!base_is_src)
+ op->dest.offset -= post_inc->src.offset;
+ else
+ op->src.offset -= post_inc->src.offset;
+ }
+ list_add_tail(&post_inc->list, ops_list);
+
+ return ret;
+}
+
+int arm_decode_ld_st_regs_pair_pre(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list)
+{
+ int ret = 0;
+ unsigned int base_reg;
+ bool base_is_src;
+ struct stack_op *op;
+ struct stack_op *pre_inc;
+
+ ret = arm_decode_ld_st_regs_pair_off(instr, type, immediate, ops_list);
+ if (ret < 0 || *type == INSN_OTHER)
+ return ret;
+
+ op = list_first_entry(ops_list, typeof(*op), list);
+ if (op->dest.type == OP_DEST_REG_INDIRECT) {
+ base_reg = op->dest.reg;
+ base_is_src = false;
+ } else if (op->src.type == OP_SRC_REG_INDIRECT) {
+ base_reg = op->src.reg;
+ base_is_src = true;
+ } else {
+ WARN("Unexpected base type");
+ return -1;
+ }
+
+ pre_inc = malloc(sizeof(*pre_inc));
+ pre_inc->dest.type = OP_DEST_REG;
+ pre_inc->dest.reg = base_reg;
+ pre_inc->src.type = OP_SRC_ADD;
+ pre_inc->src.reg = base_reg;
+ pre_inc->src.offset = (int)*immediate;
+
+ /* Adapt offsets */
+ list_for_each_entry(op, ops_list, list) {
+ if (!base_is_src)
+ op->dest.offset -= pre_inc->src.offset;
+ else
+ op->src.offset -= pre_inc->src.offset;
+ }
+ list_add(&pre_inc->list, ops_list);
+
+ return 0;
+}
diff --git a/tools/objtool/arch/arm64/include/insn_decode.h b/tools/objtool/arch/arm64/include/insn_decode.h
index 9043ca6f6708..caeb40942b18 100644
--- a/tools/objtool/arch/arm64/include/insn_decode.h
+++ b/tools/objtool/arch/arm64/include/insn_decode.h
@@ -94,6 +94,18 @@ int arm_decode_br_uncond_reg(u32 instr, enum insn_type *type,
struct list_head *ops_list);
/* arm64 load/store instructions */
+int arm_decode_ld_st_noalloc_pair_off(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list);
+int arm_decode_ld_st_regs_pair_post(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list);
+int arm_decode_ld_st_regs_pair_off(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list);
+int arm_decode_ld_st_regs_pair_pre(u32 instr, enum insn_type *type,
+ unsigned long *immediate,
+ struct list_head *ops_list);
int arm_decode_ld_st_regs_unsc_imm(u32 instr, enum insn_type *type,
unsigned long *immediate,
struct list_head *ops_list);
--
2.21.0
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next prev parent reply other threads:[~2020-01-09 16:14 UTC|newest]
Thread overview: 91+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-09 16:02 [RFC v5 00/57] objtool: Add support for arm64 Julien Thierry
2020-01-09 16:02 ` [RFC v5 01/57] objtool: check: Remove redundant checks on operand type Julien Thierry
2020-01-09 16:02 ` [RFC v5 02/57] objtool: check: Clean instruction state before each function validation Julien Thierry
2020-01-09 16:02 ` [RFC v5 03/57] objtool: check: Use arch specific values in restore_reg() Julien Thierry
2020-01-09 16:02 ` [RFC v5 04/57] objtool: check: Ignore empty alternative groups Julien Thierry
2020-01-21 16:30 ` Josh Poimboeuf
2020-01-23 11:45 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 05/57] objtool: Add abstraction for computation of symbols offsets Julien Thierry
2020-01-09 16:02 ` [RFC v5 06/57] objtool: Give ORC functions consistent name Julien Thierry
2020-01-09 16:02 ` [RFC v5 07/57] objtool: orc: Refactor ORC API for other architectures to implement Julien Thierry
2020-01-09 16:02 ` [RFC v5 08/57] objtool: Make ORC support optional Julien Thierry
2020-01-21 16:37 ` Josh Poimboeuf
2020-01-23 11:45 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 09/57] objtool: Move registers and control flow to arch-dependent code Julien Thierry
2020-01-09 16:02 ` [RFC v5 10/57] objtool: Split generic and arch specific CFI definitions Julien Thierry
2020-01-09 16:02 ` [RFC v5 11/57] objtool: Abstract alternative special case handling Julien Thierry
2020-01-20 14:54 ` Peter Zijlstra
2020-01-23 11:45 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 12/57] objtool: check: Allow jumps from an alternative group to itself Julien Thierry
2020-01-20 14:56 ` Peter Zijlstra
2020-01-21 10:30 ` Will Deacon
2020-01-21 17:33 ` Josh Poimboeuf
2020-01-23 13:42 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 13/57] objtool: Refactor switch-tables code to support other architectures Julien Thierry
2020-01-09 16:02 ` [RFC v5 14/57] objtool: Do not look for STT_NOTYPE symbols Julien Thierry
2020-01-13 10:20 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 15/57] objtool: Support addition to set frame pointer Julien Thierry
2020-01-09 16:02 ` [RFC v5 16/57] objtool: Support restoring BP from the stack without POP Julien Thierry
2020-01-09 16:02 ` [RFC v5 17/57] objtool: Make stack validation more generic Julien Thierry
2020-01-09 16:02 ` [RFC v5 18/57] objtool: Support multiple stack_op per instruction Julien Thierry
2020-01-09 16:02 ` [RFC v5 19/57] objtool: arm64: Add required implementation for supporting the aarch64 architecture in objtool Julien Thierry
2020-01-09 16:02 ` [RFC v5 20/57] objtool: arm64: Decode unknown instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 21/57] objtool: arm64: Decode simple data processing instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 22/57] objtool: arm64: Decode add/sub immediate instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 23/57] objtool: arm64: Decode logical data processing instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 24/57] objtool: arm64: Decode system instructions not affecting the flow Julien Thierry
2020-01-09 16:02 ` [RFC v5 25/57] objtool: arm64: Decode calls to higher EL Julien Thierry
2020-01-09 16:02 ` [RFC v5 26/57] objtool: arm64: Decode brk instruction Julien Thierry
2020-01-09 16:02 ` [RFC v5 27/57] objtool: arm64: Decode instruction triggering context switch Julien Thierry
2020-01-09 16:02 ` [RFC v5 28/57] objtool: arm64: Decode branch instructions with PC relative immediates Julien Thierry
2020-01-09 16:02 ` [RFC v5 29/57] objtool: arm64: Decode branch to register instruction Julien Thierry
2020-01-09 16:02 ` [RFC v5 30/57] objtool: arm64: Decode basic load/stores Julien Thierry
2020-01-09 16:02 ` [RFC v5 31/57] objtool: arm64: Decode load/store with register offset Julien Thierry
2020-01-09 16:02 ` Julien Thierry [this message]
2020-01-09 16:02 ` [RFC v5 33/57] objtool: arm64: Decode FP/SIMD load/store instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 34/57] objtool: arm64: Decode load/store exclusive Julien Thierry
2020-01-09 16:02 ` [RFC v5 35/57] objtool: arm64: Decode atomic load/store Julien Thierry
2020-01-09 16:02 ` [RFC v5 36/57] objtool: arm64: Decode pointer auth load instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 37/57] objtool: arm64: Decode load acquire/store release Julien Thierry
2020-01-09 16:02 ` [RFC v5 38/57] objtool: arm64: Decode load/store with memory tag Julien Thierry
2020-01-09 16:02 ` [RFC v5 39/57] objtool: arm64: Decode load literal Julien Thierry
2020-01-09 16:02 ` [RFC v5 40/57] objtool: arm64: Decode register data processing instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 41/57] objtool: arm64: Decode FP/SIMD " Julien Thierry
2020-01-09 16:02 ` [RFC v5 42/57] objtool: arm64: Decode SVE instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 43/57] gcc-plugins: objtool: Add plugin to detect switch table on arm64 Julien Thierry
2020-01-09 16:02 ` [RFC v5 44/57] objtool: arm64: Implement functions to add switch tables alternatives Julien Thierry
2020-01-15 16:37 ` Raphael Gault
2020-01-17 8:28 ` Julien Thierry
2020-01-09 16:02 ` [RFC v5 45/57] objtool: arm64: Enable stack validation for arm64 Julien Thierry
2020-01-09 16:02 ` [RFC v5 46/57] arm64: alternative: Mark .altinstr_replacement as containing executable instructions Julien Thierry
2020-01-09 16:02 ` [RFC v5 47/57] arm64: assembler: Add macro to annotate asm function having non standard stack-frame Julien Thierry
2020-01-21 10:30 ` Will Deacon
2020-01-23 13:45 ` Julien Thierry
2020-01-23 14:40 ` Will Deacon
2020-01-09 16:02 ` [RFC v5 48/57] arm64: sleep: Prevent stack frame warnings from objtool Julien Thierry
2020-01-09 16:02 ` [RFC v5 49/57] arm64: kvm: Annotate non-standard stack frame functions Julien Thierry
2020-01-09 16:02 ` [RFC v5 50/57] arm64: kernel: Add exception on kuser32 to prevent stack analysis Julien Thierry
2020-01-09 16:02 ` [RFC v5 51/57] arm64: crypto: Add exceptions for crypto object " Julien Thierry
2020-01-09 16:02 ` [RFC v5 52/57] arm64: kernel: Annotate non-standard stack frame functions Julien Thierry
2020-01-09 16:02 ` [RFC v5 53/57] arm64: Generate no-ops to pad executable section Julien Thierry
2020-01-09 16:02 ` [RFC v5 54/57] arm64: Move constant to rodata Julien Thierry
2020-01-09 16:02 ` [RFC v5 55/57] arm64: Mark sigreturn32.o as containing non standard code Julien Thierry
2020-01-09 16:02 ` [RFC v5 56/57] arm64: entry: Avoid empty alternatives entries Julien Thierry
2020-01-09 16:51 ` Mark Rutland
2020-01-21 10:30 ` Will Deacon
2020-01-09 16:03 ` [RFC v5 57/57] arm64: crypto: Remove redundant branch Julien Thierry
2020-01-12 8:42 ` [RFC v5 00/57] objtool: Add support for arm64 Nathan Chancellor
2020-01-13 7:57 ` Julien Thierry
2020-01-21 10:31 ` Will Deacon
2020-01-21 17:08 ` Nick Desaulniers
2020-01-21 18:06 ` Will Deacon
2020-01-21 18:30 ` Josh Poimboeuf
2020-01-22 14:47 ` Will Deacon
2020-01-13 17:18 ` Nick Desaulniers
2020-01-20 15:07 ` Peter Zijlstra
2020-01-21 17:50 ` Josh Poimboeuf
2020-01-23 13:56 ` Julien Thierry
2020-01-21 10:30 ` Will Deacon
2020-01-23 13:52 ` Julien Thierry
2020-01-23 14:35 ` Will Deacon
2020-01-23 15:11 ` Julien Thierry
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