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Sun, 12 Jan 2020 23:49:36 -0500 (EST) From: Samuel Holland To: Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Mark Rutland , Maxime Ripard , Chen-Yu Tsai , Russell King , Catalin Marinas , Will Deacon Subject: [PATCH 0/9] sunxi: Support IRQ wakeup from deep sleep Date: Sun, 12 Jan 2020 22:49:27 -0600 Message-Id: <20200113044936.26038-1-samuel@sholland.org> X-Mailer: git-send-email 2.23.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200112_204948_037116_3CAC6015 X-CRM114-Status: GOOD ( 17.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Samuel Holland Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Allwinner sun8i/sun50i SoCs (A31 and newer) have two interrupt controllers: GIC and R_INTC. GIC does not support wakeup, and is inaccessible from the ARISC (power management coprocessor). R_INTC controls the NMI pin, and provides 16-32 IRQs to the ARISC. The first 16 of these correspond 1:1 to a block of GIC IRQs starting with the NMI. This series replaces the existing chained irqchip driver used only to control the NMI, with a stacked irqchip driver that also provides wakeup capability for those 16 IRQs. The idea is that we preconfigure the ARISC's IRQ controller, and then it knows to wake up as soon as it receives an IRQ. I went back and forth about updating the existing driver versus writing a new one. The NMI-only control on sun7i (A20) and sun9i (A80) is missing MASK_REG, so it would need a different irq_chip definition. And the only benefit it would get is the chained->stacked conversion, since there's no separate coprocessor to see the IRQs during suspend. So ultimately I went with a new driver. It may be useful to separately do the chained->stacked conversion on the sunxi-nmi driver as well. Patch 1 adds the new driver. Patch 2 adds wakeup capability. Remaining patches update the DT+bindings to use R_INTC where beneficial With appropriate firmware, this series allows waking from RTC and NMI (power button, plugging in USB, etc.). Wake from Port L GPIO interrupts (gpio-keys, wifi, etc.) requires some patches to the pinctrl driver. Samuel Holland (9): irqchip/sun6i-r: Switch to a stacked irqchip driver irqchip/sun6i-r: Add wakeup support dt-bindings: irq: Add a compatible for the H3 R_INTC ARM: dts: sunxi: h3/h5: Add r_intc node ARM: dts: sunxi: h3/h5: Move wakeup-capable IRQs to r_intc ARM: dts: sunxi: a83t: Move wakeup-capable IRQs to r_intc arm64: dts: allwinner: a64: Move wakeup-capable IRQs to r_intc arm64: dts: allwinner: h6: Fix indentation of IR node arm64: dts: allwinner: Move wakeup-capable IRQs to r_intc .../allwinner,sun7i-a20-sc-nmi.yaml | 3 + arch/arm/boot/dts/sun8i-a83t.dtsi | 9 +- arch/arm/boot/dts/sunxi-h3-h5.dtsi | 20 +- arch/arm/mach-sunxi/Kconfig | 1 + arch/arm64/Kconfig.platforms | 1 + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 11 +- arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 33 ++- drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-sun6i-r.c | 273 ++++++++++++++++++ drivers/irqchip/irq-sunxi-nmi.c | 26 +- 10 files changed, 329 insertions(+), 49 deletions(-) create mode 100644 drivers/irqchip/irq-sun6i-r.c -- 2.23.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel