From: Russell King - ARM Linux admin <linux@armlinux.org.uk>
To: Andre Przywara <andre.przywara@arm.com>
Cc: Andrew Lunn <andrew@lunn.ch>,
netdev@vger.kernel.org,
Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>,
Michal Simek <michal.simek@xilinx.com>,
linux-kernel@vger.kernel.org,
Robert Hancock <hancock@sedsystems.ca>,
"David S . Miller" <davem@davemloft.net>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 07/14] net: axienet: Fix SGMII support
Date: Sat, 18 Jan 2020 11:22:59 +0000 [thread overview]
Message-ID: <20200118112258.GT25745@shell.armlinux.org.uk> (raw)
In-Reply-To: <20200110170457.GH25745@shell.armlinux.org.uk>
On Fri, Jan 10, 2020 at 05:04:57PM +0000, Russell King - ARM Linux admin wrote:
> Maybe something like the below will help?
>
> Basically, use phylink_mii_pcs_get_state() instead of
> axienet_mac_pcs_get_state(), and setup lp->phylink_config.pcs_mii
> to point at the MII bus, and lp->phylink_config.pcs_mii_addr to
> access the internal PHY (as per C_PHYADDR parameter.)
>
> You may have some fuzz (with gnu patch) while trying to apply this,
> as you won't have the context for the first and last hunks in this
> patch.
>
> This will probably not be the final version of the patch anyway;
> there's some possibility to pull some of the functionality out of
> phylib into a more general library which would avoid some of the
> functional duplication.
Hi Andre,
Did you have a chance to see whether this helps?
Russell.
>
> diff --git a/drivers/net/phy/phylink.c b/drivers/net/phy/phylink.c
> index 75a74a16dc3d..44198fdb3c01 100644
> --- a/drivers/net/phy/phylink.c
> +++ b/drivers/net/phy/phylink.c
> @@ -2073,4 +2073,105 @@ phy_interface_t phylink_select_serdes_interface(unsigned long *interfaces,
> }
> EXPORT_SYMBOL_GPL(phylink_select_serdes_interface);
>
> +static void phylink_decode_advertisement(struct phylink_link_state *state)
> +{
> + __ETHTOOL_DECLARE_LINK_MODE_MASK(u);
> +
> + linkmode_and(u, state->lp_advertising, state->advertising);
> +
> + if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, u)) {
> + state->pause = MLO_PAUSE_RX | MLO_PAUSE_TX;
> + } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, u)) {
> + if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> + state->lp_advertising))
> + state->pause |= MLO_PAUSE_TX;
> + if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> + state->advertising))
> + state->pause |= MLO_PAUSE_RX;
> + }
> +
> + if (linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, u)) {
> + state->speed = SPEED_2500;
> + state->duplex = DUPLEX_FULL;
> + } else if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, u)) {
> + state->pause = SPEED_1000;
> + state->duplex = DUPLEX_FULL;
> + } else {
> + state->link = false;
> + }
> +}
> +
> +void phylink_mii_pcs_get_state(struct phylink_config *config,
> + struct phylink_link_state *state)
> +{
> + struct mii_bus *bus = config->pcs_mii;
> + int addr = config->pcs_mii_addr;
> + int bmsr, lpa;
> +
> + bmsr = mdiobus_read(bus, addr, MII_BMSR);
> + lpa = mdiobus_read(bus, addr, MII_LPA);
> + if (bmsr < 0 || lpa < 0) {
> + state->link = false;
> + return;
> + }
> +
> + state->link = !!(bmsr & BMSR_LSTATUS);
> + state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
> +
> + switch (state->interface) {
> + case PHY_INTERFACE_MODE_1000BASEX:
> + if (lpa & LPA_1000XFULL)
> + linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT,
> + state->lp_advertising);
> + goto lpa_8023z;
> +
> + case PHY_INTERFACE_MODE_2500BASEX:
> + if (lpa & LPA_1000XFULL)
> + linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT,
> + state->lp_advertising);
> + lpa_8023z:
> + if (lpa & LPA_1000XPAUSE)
> + linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
> + state->lp_advertising);
> + if (lpa & LPA_1000XPAUSE_ASYM)
> + linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
> + state->lp_advertising);
> + if (lpa & LPA_LPACK)
> + linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT,
> + state->lp_advertising);
> + phylink_decode_advertisement(state);
> + break;
> +
> + case PHY_INTERFACE_MODE_SGMII:
> + switch (lpa & 0x8c00) {
> + case 0x8000:
> + state->speed = SPEED_10;
> + break;
> + case 0x8400:
> + state->speed = SPEED_100;
> + break;
> + case 0x8800:
> + state->speed = SPEED_1000;
> + break;
> + default:
> + state->link = false;
> + break;
> + }
> + switch (lpa & 0x9000) {
> + case 0x9000:
> + state->duplex = DUPLEX_FULL;
> + break;
> + case 0x8000:
> + state->duplex = DUPLEX_HALF;
> + break;
> + }
> + break;
> +
> + default:
> + state->link = false;
> + break;
> + }
> +}
> +EXPORT_SYMBOL_GPL(phylink_mii_pcs_get_state);
> +
> MODULE_LICENSE("GPL v2");
> diff --git a/include/linux/phylink.h b/include/linux/phylink.h
> index 4ea76e083847..cf0fa39b4b21 100644
> --- a/include/linux/phylink.h
> +++ b/include/linux/phylink.h
> @@ -65,6 +65,9 @@ enum phylink_op_type {
> struct phylink_config {
> struct device *dev;
> enum phylink_op_type type;
> +
> + struct mii_bus *pcs_mii;
> + int pcs_mii_addr;
> };
>
> /**
> @@ -292,4 +295,7 @@ phy_interface_t phylink_select_serdes_interface(unsigned long *interfaces,
> const phy_interface_t *pref,
> size_t nprefs);
>
> +void phylink_mii_pcs_get_state(struct phylink_config *config,
> + struct phylink_link_state *state);
> +
> #endif
>
> --
> RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
> FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
> According to speedtest.net: 11.9Mbps down 500kbps up
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
FTTC broadband for 0.8mile line in suburbia: sync at 12.1Mbps down 622kbps up
According to speedtest.net: 11.9Mbps down 500kbps up
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2020-01-18 11:24 UTC|newest]
Thread overview: 65+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-10 11:54 [PATCH 00/14] net: axienet: Error handling, SGMII and 64-bit DMA fixes Andre Przywara
2020-01-10 11:54 ` [PATCH 01/14] net: xilinx: temac: Relax Kconfig dependencies Andre Przywara
2020-01-10 14:19 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 02/14] net: axienet: Propagate failure of DMA descriptor setup Andre Przywara
2020-01-10 14:54 ` Radhey Shyam Pandey
2020-01-10 17:53 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 03/14] net: axienet: Fix DMA descriptor cleanup path Andre Przywara
2020-01-10 15:14 ` Radhey Shyam Pandey
2020-01-10 15:43 ` Andre Przywara
2020-01-10 17:05 ` Radhey Shyam Pandey
2020-01-16 18:03 ` Andre Przywara
2020-01-20 18:32 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 04/14] net: axienet: Improve DMA error handling Andre Przywara
2020-01-10 15:26 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 05/14] net: axienet: Factor out TX descriptor chain cleanup Andre Przywara
2020-01-10 18:04 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 06/14] net: axienet: Check for DMA mapping errors Andre Przywara
2020-01-13 5:54 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 07/14] net: axienet: Fix SGMII support Andre Przywara
2020-01-10 14:04 ` Andrew Lunn
2020-01-10 14:20 ` Andre Przywara
2020-01-10 14:26 ` Andrew Lunn
2020-01-10 15:04 ` Russell King - ARM Linux admin
2020-01-10 15:22 ` Russell King - ARM Linux admin
2020-01-10 17:04 ` Russell King - ARM Linux admin
2020-01-18 11:22 ` Russell King - ARM Linux admin [this message]
2020-01-20 14:50 ` Andre Przywara
2020-01-20 15:45 ` Russell King - ARM Linux admin
2020-01-27 17:04 ` Andre Przywara
2020-01-27 17:20 ` Radhey Shyam Pandey
2020-01-27 18:53 ` Russell King - ARM Linux admin
2020-04-22 1:45 ` Xilinx axienet 1000BaseX support (was: Re: [PATCH 07/14] net: axienet: Fix SGMII support) Robert Hancock
2020-04-22 7:51 ` Russell King - ARM Linux admin
2020-04-22 16:31 ` Xilinx axienet 1000BaseX support Robert Hancock
2020-04-28 21:59 ` Robert Hancock
2020-04-28 23:01 ` Russell King - ARM Linux admin
2020-04-28 23:51 ` Robert Hancock
2020-04-29 8:21 ` Russell King - ARM Linux admin
2020-01-10 14:58 ` [PATCH 07/14] net: axienet: Fix SGMII support Russell King - ARM Linux admin
2020-01-10 17:32 ` Andre Przywara
2020-01-10 18:05 ` Russell King - ARM Linux admin
2020-01-10 19:33 ` Andrew Lunn
2020-01-10 11:54 ` [PATCH 08/14] net: axienet: Drop MDIO interrupt registers from ethtools dump Andre Przywara
2020-01-13 6:02 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 09/14] net: axienet: Add mii-tool support Andre Przywara
2020-01-13 6:12 ` Radhey Shyam Pandey
2020-03-12 11:41 ` Andre Przywara
2020-01-10 11:54 ` [PATCH 10/14] net: axienet: Wrap DMA pointer writes to prepare for 64 bit Andre Przywara
2020-01-10 11:54 ` [PATCH 11/14] net: axienet: Upgrade descriptors to hold 64-bit addresses Andre Przywara
2020-01-14 16:35 ` Radhey Shyam Pandey
2020-01-14 17:29 ` Andre Przywara
2020-01-10 11:54 ` [PATCH 12/14] net: axienet: Autodetect 64-bit DMA capability Andre Przywara
2020-01-10 14:08 ` Andrew Lunn
2020-01-10 14:13 ` Andre Przywara
2020-01-10 14:22 ` Andrew Lunn
2020-01-10 15:08 ` Andre Przywara
2020-01-10 15:22 ` Andrew Lunn
2020-01-14 17:03 ` Radhey Shyam Pandey
2020-01-14 17:41 ` Andre Przywara
2020-01-15 6:02 ` Radhey Shyam Pandey
2020-01-10 11:54 ` [PATCH 13/14] net: axienet: Allow DMA to beyond 4GB Andre Przywara
2020-01-10 11:54 ` [PATCH 14/14] net: axienet: Update devicetree binding documentation Andre Przywara
2020-01-21 21:51 ` Rob Herring
2020-01-24 16:29 ` Andre Przywara
2020-01-27 9:28 ` Radhey Shyam Pandey
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20200118112258.GT25745@shell.armlinux.org.uk \
--to=linux@armlinux.org.uk \
--cc=andre.przywara@arm.com \
--cc=andrew@lunn.ch \
--cc=davem@davemloft.net \
--cc=hancock@sedsystems.ca \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=michal.simek@xilinx.com \
--cc=netdev@vger.kernel.org \
--cc=radhey.shyam.pandey@xilinx.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).