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[24.155.109.49]) by smtp.gmail.com with ESMTPSA id v14sm13967733oto.16.2020.01.21.14.38.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Jan 2020 14:38:08 -0800 (PST) Received: (nullmailer pid 1428 invoked by uid 1000); Tue, 21 Jan 2020 22:38:07 -0000 Date: Tue, 21 Jan 2020 16:38:07 -0600 From: Rob Herring To: Anson Huang Subject: Re: [PATCH V3 1/3] dt-bindings: pinctrl: Convert i.MX8MQ to json-schema Message-ID: <20200121223807.GA24850@bogus> References: <1579051845-30378-1-git-send-email-Anson.Huang@nxp.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1579051845-30378-1-git-send-email-Anson.Huang@nxp.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200121_143809_759944_85772364 X-CRM114-Status: GOOD ( 21.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aisheng.dong@nxp.com, mark.rutland@arm.com, devicetree@vger.kernel.org, festevam@gmail.com, linus.walleij@linaro.org, linux-kernel@vger.kernel.org, stefan@agner.ch, linux-gpio@vger.kernel.org, Linux-imx@nxp.com, kernel@pengutronix.de, shawnguo@kernel.org, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jan 15, 2020 at 09:30:43AM +0800, Anson Huang wrote: > Convert the i.MX8MQ pinctrl binding to DT schema format using json-schema > > Signed-off-by: Anson Huang > --- > Changes since V2: > - the lisence should be GPL-2.0. > --- > .../bindings/pinctrl/fsl,imx8mq-pinctrl.txt | 36 ----------- > .../bindings/pinctrl/fsl,imx8mq-pinctrl.yaml | 69 ++++++++++++++++++++++ > 2 files changed, 69 insertions(+), 36 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt > deleted file mode 100644 > index 66de750..0000000 > --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.txt > +++ /dev/null > @@ -1,36 +0,0 @@ > -* Freescale IMX8MQ IOMUX Controller > - > -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > -for common binding part and usage. > - > -Required properties: > -- compatible: "fsl,imx8mq-iomuxc" > -- reg: should contain the base physical address and size of the iomuxc > - registers. > - > -Required properties in sub-nodes: > -- fsl,pins: each entry consists of 6 integers and represents the mux and config > - setting for one pin. The first 5 integers - input_val> are specified using a PIN_FUNC_ID macro, which can be found in > - imx8mq-pinfunc.h under device tree source folder. The last integer CONFIG is > - the pad setting value like pull-up on this pin. Please refer to i.MX8M Quad > - Reference Manual for detailed CONFIG settings. > - > -Examples: > - > -&uart1 { > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_uart1>; > -}; > - > -iomuxc: pinctrl@30330000 { > - compatible = "fsl,imx8mq-iomuxc"; > - reg = <0x0 0x30330000 0x0 0x10000>; > - > - pinctrl_uart1: uart1grp { > - fsl,pins = < > - MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 > - MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX 0x49 > - >; > - }; > -}; > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml > new file mode 100644 > index 0000000..e010808 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mq-pinctrl.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mq-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale IMX8MQ IOMUX Controller > + > +maintainers: > + - Anson Huang > + > +description: > + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > + for common binding part and usage. > + > +properties: > + compatible: > + const: fsl,imx8mq-iomuxc > + > + reg: > + maxItems: 1 > + > +# Client device subnode's properties > +patternProperties: > + 'grp$': > + type: object > + description: > + Pinctrl node's client devices use subnodes for desired pin configuration. > + Client device subnodes use below standard properties. > + > + properties: > + fsl,pins: > + allOf: > + - $ref: /schemas/types.yaml#/definitions/uint32-array > + description: > + each entry consists of 6 integers and represents the mux and config > + setting for one pin. The first 5 integers + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can > + be found in . The last > + integer CONFIG is the pad setting value like pull-up on this pin. Please > + refer to i.MX8M Quad Reference Manual for detailed CONFIG settings. Based on the description, I think this should be an uint32-matrix type instead with a schema like this: items: items: - description: mux_reg - description: conf_reg - description: input_reg - description: mux_val - description: input_val - description: pad setting (With better descriptions preferrably) The dts files should then be bracketed accordingly. > + > + required: > + - fsl,pins > + > + additionalProperties: false > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + # Pinmux controller node > + - | > + iomuxc: pinctrl@30330000 { > + compatible = "fsl,imx8mq-iomuxc"; > + reg = <0x30330000 0x10000>; > + > + pinctrl_uart1: uart1grp { > + fsl,pins = < > + 0x234 0x49C 0x4F4 0x0 0x0 0x49 > + 0x238 0x4A0 0x4F4 0x0 0x0 0x49 > + >; > + }; > + }; > + > +... > -- > 2.7.4 > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel