From: Peter Zijlstra <peterz@infradead.org>
To: James Morse <james.morse@arm.com>
Cc: mark.rutland@arm.com, catalin.marinas@arm.com,
linux-mm@kvack.org, guohanjun@huawei.com, will@kernel.org,
linux-arch@vger.kernel.org, yuzhao@google.com, maz@kernel.org,
suzuki.poulose@arm.com, steven.price@arm.com, arm@kernel.org,
Dave.Martin@arm.com, arnd@arndb.de,
Zhenyu Ye <yezhenyu2@huawei.com>,
npiggin@gmail.com, zhangshaokun@hisilicon.com,
broonie@kernel.org, rostedt@goodmis.org,
prime.zeng@hisilicon.com, tglx@linutronix.de,
linux-arm-kernel@lists.infradead.org, xiexiangyou@huawei.com,
linux-kernel@vger.kernel.org, aneesh.kumar@linux.ibm.com,
akpm@linux-foundation.org
Subject: Re: [RFC PATCH v4 0/6] arm64: tlb: add support for TTL feature
Date: Wed, 25 Mar 2020 17:41:44 +0100 [thread overview]
Message-ID: <20200325164144.GB20696@hirez.programming.kicks-ass.net> (raw)
In-Reply-To: <aaf017a8-3658-fe4d-c0cf-2f45656020af@arm.com>
On Wed, Mar 25, 2020 at 04:15:58PM +0000, James Morse wrote:
> Hi Zhenyu,
>
> On 3/24/20 1:45 PM, Zhenyu Ye wrote:
> > In order to reduce the cost of TLB invalidation, the ARMv8.4 TTL
> > feature allows TLBs to be issued with a level allowing for quicker
> > invalidation. This series provide support for this feature.
> >
> > Patch 1 and Patch 2 was provided by Marc on his NV series[1] patches,
> > which detect the TTL feature and add __tlbi_level interface.
>
> How does this interact with THP?
> (I don't see anything on that in the series.)
>
> With THP, there is no one answer to the size of mapping in a VMA.
> This is a problem because the arm-arm has in "Translation table level
> hints" in D5.10.2 of DDI0487E.a:
> | If an incorrect value for the entry being invalidated by the
> | instruction is specified in the TTL field, then no entries are
> | required by the architecture to be invalidated from the TLB.
>
> If we get it wrong, not TLB maintenance occurs!
>
> Unless THP leaves its fingerprints on the vma, I think you can only do
> this for VMA types that THP can't mess with. (see
> transparent_hugepage_enabled())
The convention way to deal with that is to issue the TBLI for all
possible sizes.
Power9 has all this, please look there.
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next prev parent reply other threads:[~2020-03-25 16:41 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-24 13:45 [RFC PATCH v4 0/6] arm64: tlb: add support for TTL feature Zhenyu Ye
2020-03-24 13:45 ` [RFC PATCH v4 1/6] arm64: Detect the ARMv8.4 " Zhenyu Ye
2020-03-24 13:45 ` [RFC PATCH v4 2/6] arm64: Add level-hinted TLB invalidation helper Zhenyu Ye
2020-03-24 13:45 ` [RFC PATCH v4 3/6] arm64: Add level-hinted TLB invalidation helper to tlbi_user Zhenyu Ye
2020-03-24 14:19 ` Marc Zyngier
2020-03-25 2:47 ` Zhenyu Ye
2020-03-24 13:45 ` [RFC PATCH v4 4/6] mm: Add page table level flags to vm_flags Zhenyu Ye
2020-03-24 18:44 ` Steven Rostedt
2020-03-25 2:10 ` yezhenyu (A)
2020-03-24 13:45 ` [RFC PATCH v4 5/6] arm64: tlb: Use translation level hint in vm_flags Zhenyu Ye
2020-03-24 14:45 ` Marc Zyngier
2020-03-25 8:00 ` Zhenyu Ye
2020-03-25 14:13 ` Marc Zyngier
2020-03-26 7:11 ` Zhenyu Ye
2020-03-24 13:45 ` [RFC PATCH v4 6/6] mm: Set VM_LEVEL flags in some tlb_flush functions Zhenyu Ye
2020-03-24 15:01 ` [RFC PATCH v4 0/6] arm64: tlb: add support for TTL feature Peter Zijlstra
2020-03-25 4:49 ` Zhenyu Ye
2020-03-25 13:32 ` Peter Zijlstra
2020-03-26 7:15 ` Zhenyu Ye
2020-03-25 16:15 ` James Morse
2020-03-25 16:41 ` Peter Zijlstra [this message]
2020-03-26 6:45 ` Zhenyu Ye
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