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Tue, 21 Apr 2020 09:09:43 -0700 (PDT) From: Jean-Philippe Brucker To: will@kernel.org, mark.rutland@arm.com Subject: [PATCH] perf/smmuv3: Allow sharing MMIO registers with the SMMU driver Date: Tue, 21 Apr 2020 17:57:46 +0200 Message-Id: <20200421155745.19815-1-jean-philippe@linaro.org> X-Mailer: git-send-email 2.26.0 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200421_090947_156959_8B270916 X-CRM114-Status: GOOD ( 13.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jean-Philippe Brucker , iommu@lists.linux-foundation.org, lorenzo.pieralisi@arm.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some Arm SMMUv3 implementations, for example Arm CoreLink MMU-600, embed the PMCG registers into the SMMU MMIO regions. It currently causes probe failure because the PMU and SMMU drivers request overlapping resources. Avoid the conflict by calling devm_ioremap() directly from the PMU driver. We loose some sanity-checking of the memory map provided by firmware, which doesn't seem catastrophic. Signed-off-by: Jean-Philippe Brucker --- So this is the simplest solution, and I don't think we're missing much by skipping the resource reservation. I've also been exploring a more complex approach [1] which has the SMMU driver perform resource reservation on behalf of the PMU driver, but I'm not sure it's necessary. Please test, I've only tried the RevC FastModel using devicetree so far. [1] https://jpbrucker.net/git/linux/log/?h=smmu/pmu --- drivers/perf/arm_smmuv3_pmu.c | 28 +++++++++++++++++++++------- 1 file changed, 21 insertions(+), 7 deletions(-) diff --git a/drivers/perf/arm_smmuv3_pmu.c b/drivers/perf/arm_smmuv3_pmu.c index ca183a53a7f10..ad63d1e73333f 100644 --- a/drivers/perf/arm_smmuv3_pmu.c +++ b/drivers/perf/arm_smmuv3_pmu.c @@ -730,8 +730,8 @@ static void smmu_pmu_get_acpi_options(struct smmu_pmu *smmu_pmu) static int smmu_pmu_probe(struct platform_device *pdev) { + struct resource *res_0, *res_1; struct smmu_pmu *smmu_pmu; - struct resource *res_0; u32 cfgr, reg_size; u64 ceid_64[2]; int irq, err; @@ -759,18 +759,32 @@ static int smmu_pmu_probe(struct platform_device *pdev) .capabilities = PERF_PMU_CAP_NO_EXCLUDE, }; + /* + * If the PMCG registers are embedded into the SMMU regions, the + * resources have to be shared with the SMMU driver. Use ioremap() + * rather than ioremap_resource() to avoid conflicts. + */ res_0 = platform_get_resource(pdev, IORESOURCE_MEM, 0); - smmu_pmu->reg_base = devm_ioremap_resource(dev, res_0); - if (IS_ERR(smmu_pmu->reg_base)) - return PTR_ERR(smmu_pmu->reg_base); + if (!res_0) + return -ENXIO; + + smmu_pmu->reg_base = devm_ioremap(dev, res_0->start, + resource_size(res_0)); + if (!smmu_pmu->reg_base) + return -ENOMEM; cfgr = readl_relaxed(smmu_pmu->reg_base + SMMU_PMCG_CFGR); /* Determine if page 1 is present */ if (cfgr & SMMU_PMCG_CFGR_RELOC_CTRS) { - smmu_pmu->reloc_base = devm_platform_ioremap_resource(pdev, 1); - if (IS_ERR(smmu_pmu->reloc_base)) - return PTR_ERR(smmu_pmu->reloc_base); + res_1 = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res_1) + return -ENXIO; + + smmu_pmu->reloc_base = devm_ioremap(dev, res_1->start, + resource_size(res_1)); + if (!smmu_pmu->reloc_base) + return -ENOMEM; } else { smmu_pmu->reloc_base = smmu_pmu->reg_base; } -- 2.26.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel