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Wed, 22 Apr 2020 02:59:01 -0400 (EDT) Date: Wed, 22 Apr 2020 08:58:59 +0200 From: Maxime Ripard To: "H. Nikolaus Schaller" Subject: Re: [PATCH v6 00/12] ARM/MIPS: DTS: add child nodes describing the PVRSGX GPU present in some OMAP SoC and JZ4780 (and many more) Message-ID: <20200422065859.quy6ane5v7vsy5tf@gilmour.lan> References: <20200415101008.zxzxca2vlfsefpdv@gilmour.lan> <2E3401F1-A106-4396-8FE6-51CAB72926A4@goldelico.com> <20200415130233.rgn7xrtwqicptke2@gilmour.lan> <10969e64-fe1f-d692-4984-4ba916bd2161@gmail.com> <20200420073842.nx4xb3zqvu23arkc@gilmour.lan> <20200421112129.zjmkmzo3aftksgka@gilmour.lan> <20200421141543.GU37466@atomide.com> MIME-Version: 1.0 In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200421_235908_168361_02636043 X-CRM114-Status: GOOD ( 18.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Tony Lindgren , James Hogan , Jonathan Bakker , "open list:DRM PANEL DRIVERS" , linux-mips@vger.kernel.org, Paul Cercueil , linux-samsung-soc@vger.kernel.org, Discussions about the Letux Kernel , Paul Burton , Krzysztof Kozlowski , David Airlie , Chen-Yu Tsai , Kukjin Kim , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , Daniel Vetter , Rob Herring , linux-omap , arm-soc , Thomas Bogendoerfer , Philipp Rossak , OpenPVRSGX Linux Driver Group , Linux Kernel Mailing List , Ralf Baechle , =?utf-8?Q?Beno=C3=AEt?= Cousson , kernel@pyra-handheld.com Content-Type: multipart/mixed; boundary="===============4423364029386526432==" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org --===============4423364029386526432== Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="2amunzakhfscp3kq" Content-Disposition: inline --2amunzakhfscp3kq Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Apr 21, 2020 at 07:29:32PM +0200, H. Nikolaus Schaller wrote: >=20 > > Am 21.04.2020 um 16:15 schrieb Tony Lindgren : > >=20 > > * Maxime Ripard [200421 11:22]: > >> On Tue, Apr 21, 2020 at 11:57:33AM +0200, Philipp Rossak wrote: > >>> I had a look on genpd and I'm not really sure if that fits. > >>>=20 > >>> It is basically some bit that verify that the clocks should be enable= d or > >>> disabled. > >>=20 > >> No, it can do much more than that. It's a framework to control the SoC= s power > >> domains, so clocks might be a part of it, but most of the time it's go= ing to be > >> about powering up a particular device. > >=20 > > Note that on omaps there are actually SoC module specific registers. >=20 > Ah, I see. This is of course a difference that the TI glue logic has > its own registers in the same address range as the sgx and this can't > be easily handled by a common sgx driver. >=20 > This indeed seems to be unique with omap. >=20 > > And there can be multiple devices within a single target module on > > omaps. So the extra dts node and device is justified there. > >=20 > > For other SoCs, the SGX clocks are probably best handled directly > > in pvr-drv.c PM runtime functions unless a custom hardware wrapper > > with SoC specific registers exists. >=20 > That is why we need to evaluate what the better strategy is. >=20 > So we have > a) omap which has a custom wrapper around the sgx > b) others without, i.e. an empty (or pass-through) wrapper >=20 > Which one do we make the "standard" and which one the "exception"? > What are good reasons for either one? >=20 >=20 > I am currently in strong favour of a) being standard because it > makes the pvr-drv.c simpler and really generic (independent of > wrapping into any SoC). >=20 > This will likely avoid problems if we find more SoC with yet another > scheme how the SGX clocks are wrapped. >=20 > It also allows to handle different number of clocks (A31 seems to > need 4, Samsung, A83 and JZ4780 one) without changing the sgx bindings > or making big lists of conditionals. This variance would be handled > outside the sgx core bindings and driver. I disagree. Every other GPU binding and driver is handling that just fine, = and the SGX is not special in any case here. Maxime --2amunzakhfscp3kq Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRcEzekXsqa64kGDp7j7w1vZxhRxQUCXp/rLwAKCRDj7w1vZxhR xcRVAP9+eh7XB+uk8H5QIqpRYRnQPao/m3tRHXHCz92z/5kY+QEA3HL1hmXIYsGR wTCOHiq6ZSI4eoHYRySSWAqNuTf5LwI= =1ETM -----END PGP SIGNATURE----- --2amunzakhfscp3kq-- --===============4423364029386526432== Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --===============4423364029386526432==--