From: Marc Zyngier <maz@kernel.org>
To: linux-arm-kernel@lists.infradead.org,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org
Cc: Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Andre Przywara <andre.przywara@arm.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Dave Martin <Dave.Martin@arm.com>,
George Cherian <gcherian@marvell.com>,
James Morse <james.morse@arm.com>,
"Zengtao \(B\)" <prime.zeng@hisilicon.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Jintack Lim <jintack@cs.columbia.edu>,
Julien Thierry <julien.thierry.kdev@gmail.com>
Subject: [PATCH 00/26] KVM: arm64: Preliminary NV patches
Date: Wed, 22 Apr 2020 13:00:24 +0100 [thread overview]
Message-ID: <20200422120050.3693593-1-maz@kernel.org> (raw)
Hi all,
In order not to repeat the 90+ patch series that resulted in a
deafening silence last time, I've extracted a smaller set of patches
that form the required dependencies that allow the rest of the 65 NV
patches to be added on top. Yes, it is that bad.
The one real feature here is support for the ARMv8.4-TTL extension at
Stage-2 only. The reason to support it is that it helps the hypervisor
a lot when it comes to finding out how much to invalidate. It is thus
always "supported" with NV.
The rest doesn't contain any functionality change. Most of it reworks
existing data structures and adds new accessors for the things that
get moved around. The reason for this is that:
- With NV, we end-up with multiple Stage-2 MMU contexts per VM instead
of a single one. This requires we divorce struct kvm from the S2 MMU
configuration. Of course, we stick with a single MMU context for now.
- With ARMv8.4-NV, a number of system register accesses are turned
into memory accesses into the so-called VNCR page. It is thus
convenient to make this VNCR page part of the vcpu context and avoid
copying data back and forth. For this to work, we need to make sure
that all the VNCR-aware sysregs are moved into our per-vcpu sys_regs
array instead of leaving in other data structures (the timers, for
example). The VNCR page itself isn't introduced with these patches.
- As some of these data structures change, we need a way to isolate
the userspace ABI from such change.
- The exception generation code is also reworked to prepare the
addition of EL2 exceptions.
There is also a number of cleanups that were in the full fat series
that I decided to move early to get them out of the way.
The whole this is a bit of a mix of vaguely unrelated "stuff", but it
all comes together if you look at the final series[1]. This applies on
top of v5.7-rc1.
I haven't applied any of the Tested-by: tags, as the series keeps
changing. Please keep testing though!
[1] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=kvm-arm64/nv-5.7-rc1-WIP
Christoffer Dall (2):
KVM: arm64: Factor out stage 2 page table data from struct kvm
KVM: arm64: vgic-v3: Take cpu_if pointer directly instead of vcpu
Marc Zyngier (24):
KVM: arm64: Check advertised Stage-2 page size capability
KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h
arm64: Detect the ARMv8.4 TTL feature
arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors
arm64: Add level-hinted TLB invalidation helper
KVM: arm64: Add a level hint to __kvm_tlb_flush_vmid_ipa
KVM: arm64: Use TTL hint in when invalidating stage-2 translations
KVM: arm64: Refactor vcpu_{read,write}_sys_reg
KVM: arm64: Add missing reset handlers for PMU emulation
KVM: arm64: Move sysreg reset check to boot time
KVM: arm64: Introduce accessor for ctxt->sys_reg
KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw
sys_regs access
KVM: arm64: sve: Use __vcpu_sys_reg() instead of raw sys_regs access
KVM: arm64: pauth: Use ctxt_sys_reg() instead of raw sys_regs access
KVM: arm64: debug: Use ctxt_sys_reg() instead of raw sys_regs access
KVM: arm64: Don't use empty structures as CPU reset state
KVM: arm64: Make struct kvm_regs userspace-only
KVM: arm64: Move ELR_EL1 to the system register array
KVM: arm64: Move SP_EL1 to the system register array
KVM: arm64: Disintegrate SPSR array
KVM: arm64: Move SPSR_EL1 to the system register array
KVM: arm64: timers: Rename kvm_timer_sync_hwstate to
kvm_timer_sync_user
KVM: arm64: timers: Move timer registers to the sys_regs file
KVM: arm64: Parametrize exception entry with a target EL
arch/arm64/include/asm/cpucaps.h | 3 +-
arch/arm64/include/asm/kvm_asm.h | 6 +-
arch/arm64/include/asm/kvm_emulate.h | 37 +---
arch/arm64/include/asm/kvm_host.h | 71 +++++--
arch/arm64/include/asm/kvm_hyp.h | 30 +--
arch/arm64/include/asm/kvm_mmu.h | 27 ++-
arch/arm64/include/asm/pgtable-hwdef.h | 2 +
arch/arm64/include/asm/stage2_pgtable.h | 9 +
arch/arm64/include/asm/sysreg.h | 4 +
arch/arm64/include/asm/tlbflush.h | 30 +++
arch/arm64/kernel/asm-offsets.c | 3 +-
arch/arm64/kernel/cpufeature.c | 19 ++
arch/arm64/kvm/fpsimd.c | 6 +-
arch/arm64/kvm/guest.c | 79 ++++++-
arch/arm64/kvm/handle_exit.c | 17 +-
arch/arm64/kvm/hyp/debug-sr.c | 18 +-
arch/arm64/kvm/hyp/entry.S | 3 +-
arch/arm64/kvm/hyp/switch.c | 31 ++-
arch/arm64/kvm/hyp/sysreg-sr.c | 160 +++++++-------
arch/arm64/kvm/hyp/tlb.c | 51 +++--
arch/arm64/kvm/inject_fault.c | 75 +++----
arch/arm64/kvm/regmap.c | 37 +++-
arch/arm64/kvm/reset.c | 60 ++++--
arch/arm64/kvm/sys_regs.c | 215 ++++++++++---------
include/kvm/arm_arch_timer.h | 13 +-
include/kvm/arm_vgic.h | 5 +-
virt/kvm/arm/arch_timer.c | 157 +++++++++++---
virt/kvm/arm/arm.c | 40 ++--
virt/kvm/arm/hyp/vgic-v3-sr.c | 33 +--
virt/kvm/arm/mmu.c | 267 +++++++++++++-----------
virt/kvm/arm/trace.h | 8 +-
virt/kvm/arm/vgic/vgic-v2.c | 10 +-
virt/kvm/arm/vgic/vgic-v3.c | 14 +-
virt/kvm/arm/vgic/vgic.c | 25 ++-
34 files changed, 942 insertions(+), 623 deletions(-)
--
2.26.1
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next reply other threads:[~2020-04-22 12:01 UTC|newest]
Thread overview: 78+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-04-22 12:00 Marc Zyngier [this message]
2020-04-22 12:00 ` [PATCH 01/26] KVM: arm64: Check advertised Stage-2 page size capability Marc Zyngier
2020-04-22 13:40 ` Suzuki K Poulose
2020-04-22 14:07 ` Marc Zyngier
2020-04-22 14:14 ` Suzuki K Poulose
2020-05-07 11:42 ` Alexandru Elisei
2020-04-22 12:00 ` [PATCH 02/26] KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h Marc Zyngier
2020-04-22 13:51 ` Suzuki K Poulose
2020-04-22 13:59 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 03/26] KVM: arm64: Factor out stage 2 page table data from struct kvm Marc Zyngier
2020-05-05 15:26 ` Andrew Scull
2020-05-05 16:32 ` Marc Zyngier
2020-05-05 17:23 ` Andrew Scull
2020-05-05 18:10 ` Marc Zyngier
2020-05-05 16:03 ` James Morse
2020-05-05 17:59 ` Marc Zyngier
2020-05-06 9:30 ` Marc Zyngier
2020-05-11 16:38 ` Alexandru Elisei
2020-05-12 11:17 ` James Morse
2020-05-12 15:47 ` Alexandru Elisei
2020-05-12 16:13 ` James Morse
2020-05-12 16:53 ` Alexandru Elisei
2020-05-27 8:41 ` Marc Zyngier
2020-05-27 8:45 ` Alexandru Elisei
2020-04-22 12:00 ` [PATCH 04/26] arm64: Detect the ARMv8.4 TTL feature Marc Zyngier
2020-04-27 15:55 ` Suzuki K Poulose
2020-04-22 12:00 ` [PATCH 05/26] arm64: Document SW reserved PTE/PMD bits in Stage-2 descriptors Marc Zyngier
2020-05-05 15:59 ` Andrew Scull
2020-05-06 9:39 ` Marc Zyngier
2020-05-06 10:11 ` Andrew Scull
2020-04-22 12:00 ` [PATCH 06/26] arm64: Add level-hinted TLB invalidation helper Marc Zyngier
2020-05-05 17:16 ` Andrew Scull
2020-05-06 8:05 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 07/26] KVM: arm64: Add a level hint to __kvm_tlb_flush_vmid_ipa Marc Zyngier
2020-05-07 15:08 ` Andrew Scull
2020-05-07 15:13 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 08/26] KVM: arm64: Use TTL hint in when invalidating stage-2 translations Marc Zyngier
2020-05-07 15:13 ` Andrew Scull
2020-05-12 12:04 ` James Morse
2020-05-13 9:06 ` Andrew Scull
2020-05-27 8:59 ` Marc Zyngier
2020-05-12 17:26 ` James Morse
2020-04-22 12:00 ` [PATCH 09/26] KVM: arm64: vgic-v3: Take cpu_if pointer directly instead of vcpu Marc Zyngier
2020-05-07 16:26 ` James Morse
2020-05-08 12:20 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 10/26] KVM: arm64: Refactor vcpu_{read,write}_sys_reg Marc Zyngier
2020-05-26 16:28 ` James Morse
2020-05-27 10:04 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 11/26] KVM: arm64: Add missing reset handlers for PMU emulation Marc Zyngier
2020-05-26 16:29 ` James Morse
2020-04-22 12:00 ` [PATCH 12/26] KVM: arm64: Move sysreg reset check to boot time Marc Zyngier
2020-04-22 12:00 ` [PATCH 13/26] KVM: arm64: Introduce accessor for ctxt->sys_reg Marc Zyngier
2020-04-22 12:00 ` [PATCH 14/26] KVM: arm64: hyp: Use ctxt_sys_reg/__vcpu_sys_reg instead of raw sys_regs access Marc Zyngier
2020-04-22 12:00 ` [PATCH 15/26] KVM: arm64: sve: Use __vcpu_sys_reg() " Marc Zyngier
2020-04-22 12:00 ` [PATCH 16/26] KVM: arm64: pauth: Use ctxt_sys_reg() " Marc Zyngier
2020-04-22 12:00 ` [PATCH 17/26] KVM: arm64: debug: " Marc Zyngier
2020-04-22 12:00 ` [PATCH 18/26] KVM: arm64: Don't use empty structures as CPU reset state Marc Zyngier
2020-04-24 4:07 ` Zenghui Yu
2020-04-24 7:45 ` Marc Zyngier
2020-04-28 1:34 ` Zengtao (B)
2020-04-22 12:00 ` [PATCH 19/26] KVM: arm64: Make struct kvm_regs userspace-only Marc Zyngier
2020-05-26 16:29 ` James Morse
2020-05-27 10:22 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 20/26] KVM: arm64: Move ELR_EL1 to the system register array Marc Zyngier
2020-05-26 16:29 ` James Morse
2020-05-27 10:36 ` Marc Zyngier
2020-04-22 12:00 ` [PATCH 21/26] KVM: arm64: Move SP_EL1 " Marc Zyngier
2020-05-26 16:29 ` James Morse
2020-04-22 12:00 ` [PATCH 22/26] KVM: arm64: Disintegrate SPSR array Marc Zyngier
2020-05-26 16:30 ` James Morse
2020-04-22 12:00 ` [PATCH 23/26] KVM: arm64: Move SPSR_EL1 to the system register array Marc Zyngier
2020-05-26 16:30 ` James Morse
2020-04-22 12:00 ` [PATCH 24/26] KVM: arm64: timers: Rename kvm_timer_sync_hwstate to kvm_timer_sync_user Marc Zyngier
2020-04-22 12:00 ` [PATCH 25/26] KVM: arm64: timers: Move timer registers to the sys_regs file Marc Zyngier
2020-04-22 12:00 ` [PATCH 26/26] KVM: arm64: Parametrize exception entry with a target EL Marc Zyngier
2020-05-19 10:44 ` Mark Rutland
2020-05-27 9:34 ` Marc Zyngier
2020-05-27 14:41 ` Mark Rutland
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