From: Andre Przywara <andre.przywara@arm.com>
To: Rob Herring <robh@kernel.org>, Liviu Dudau <liviu.dudau@arm.com>,
Sudeep Holla <sudeep.holla@arm.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 11/17] arm64: dts: fvp: Fix SMMU DT node
Date: Thu, 7 May 2020 12:24:24 +0100 [thread overview]
Message-ID: <20200507112430.183940-12-andre.przywara@arm.com> (raw)
In-Reply-To: <20200507112430.183940-1-andre.przywara@arm.com>
The SMMU name in the RevC FVP DT file was not fully binding compliant.
Adjust the node name to match the binding's list of allowed names, also
shuffle the order of the interrupts to comply with the expected order.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
arch/arm64/boot/dts/arm/fvp-base-revc.dts | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/arm/fvp-base-revc.dts b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
index 0cf96ceff431..b8a21092db4d 100644
--- a/arch/arm64/boot/dts/arm/fvp-base-revc.dts
+++ b/arch/arm64/boot/dts/arm/fvp-base-revc.dts
@@ -172,14 +172,14 @@
dma-coherent;
};
- smmu: smmu@2b400000 {
+ smmu: iommu@2b400000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x2b400000 0x0 0x100000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 75 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>,
- <GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
- interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
+ <GIC_SPI 77 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
dma-coherent;
#iommu-cells = <1>;
msi-parent = <&its 0x10000>;
--
2.17.1
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next prev parent reply other threads:[~2020-05-07 11:27 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-05-07 11:24 [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Andre Przywara
2020-05-07 11:24 ` [PATCH v2 01/17] dt-bindings: arm-smmu: Allow mmu-400, smmu-v1 compatible Andre Przywara
2020-05-07 11:24 ` [PATCH v2 02/17] dt-bindings: arm: gic: Allow combining arm, gic-400 compatible strings Andre Przywara
2020-05-07 11:24 ` [PATCH v2 03/17] arm64: dts: arm: Fix node address fields Andre Przywara
2020-05-07 11:24 ` [PATCH v2 04/17] arm64: dts: arm: FVP: Fix motherboard .dtsi Andre Przywara
2020-05-07 11:24 ` [PATCH v2 05/17] arm64: dts: juno: Fix mem-timer Andre Przywara
2020-05-07 11:24 ` [PATCH v2 06/17] arm64: dts: arm: Fix GIC compatible names Andre Przywara
2020-05-11 8:56 ` Marc Zyngier
2020-05-07 11:24 ` [PATCH v2 07/17] arm64: dts: arm: Fix GIC child nodes Andre Przywara
2020-05-11 8:48 ` André Przywara
2020-05-07 11:24 ` [PATCH v2 08/17] arm64: dts: arm: Fix ITS node names and #msi-cells Andre Przywara
2020-05-07 11:24 ` [PATCH v2 09/17] arm64: dts: juno: usb: Use proper DT node name Andre Przywara
2020-05-07 11:24 ` [PATCH v2 10/17] arm64: dts: arm: Fix serial node names Andre Przywara
2020-05-07 11:24 ` Andre Przywara [this message]
2020-05-07 11:24 ` [PATCH v2 12/17] arm64: dts: arm: Fix bus " Andre Przywara
2020-05-07 11:24 ` [PATCH v2 13/17] arm64: dts: juno: Fix GPU interrupt order Andre Przywara
2020-05-07 11:24 ` [PATCH v2 14/17] arm64: dts: arm: Fix VExpress LED names Andre Przywara
2020-05-07 11:24 ` [PATCH v2 15/17] arm64: dts: juno: Fix SCPI shared mem node name Andre Przywara
2020-05-07 11:24 ` [PATCH v2 16/17] dt-bindings: mali-midgard: Allow dma-coherent Andre Przywara
2020-05-07 11:24 ` [PATCH v2 17/17] dt-bindings: ehci/ohci: Allow iommus property Andre Przywara
2020-05-07 14:04 ` [PATCH v2 00/17] dts/dt-bindings: Fix Arm Ltd. ARMv8 "boards" Will Deacon
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