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Thu, 21 May 2020 07:52:26 -0500 Received: from DLEE102.ent.ti.com (157.170.170.32) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Thu, 21 May 2020 07:52:26 -0500 Received: from fllv0039.itg.ti.com (10.64.41.19) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Thu, 21 May 2020 07:52:26 -0500 Received: from localhost (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04LCqPlK071033; Thu, 21 May 2020 07:52:26 -0500 Date: Thu, 21 May 2020 18:22:25 +0530 From: Pratyush Yadav To: Subject: Re: [PATCH v5 05/19] mtd: spi-nor: add support for DTR protocol Message-ID: <20200521125225.odxcdjkoy5lckrbx@ti.com> References: <20200519142642.24131-1-p.yadav@ti.com> <20200519142642.24131-6-p.yadav@ti.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: NeoMutt/20171215 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200521_055234_431777_E895E230 X-CRM114-Status: GOOD ( 10.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alexandre Belloni , Vignesh Raghavendra , Tudor Ambarus , Richard Weinberger , Mark Brown , Sekhar Nori , linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, Ludovic Desroches , Boris Brezillon , linux-mediatek@lists.infradead.org, Miquel Raynal , Matthias Brugger , linux-mtd@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi, On 21/05/20 05:24PM, masonccyang@mxic.com.tw wrote: > > Hi Pratyush, > > > > @@ -311,6 +313,7 @@ struct flash_info { > > * BP3 is bit 6 of status register. > > * Must be used with SPI_NOR_4BIT_BP. > > */ > > +#define SPI_NOR_OCTAL_DTR_READ BIT(19) /* Flash supports octal DTR > Read. */ > > #define SPI_NOR_OCTAL_DTR_RDWR BIT(19) /* Support Octal DTR Read & Write > */ This flag only enables SNOR_HWCAPS_READ_8_8_8_DTR. It does not affect SNOR_HWCAPS_PP_8_8_8_DTR. So it shouldn't be called RDWR. > more precisely and clearly ? > > thanks, > Mason > -- Regards, Pratyush Yadav Texas Instruments India _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel