From: Gregory CLEMENT <gregory.clement@bootlin.com>
To: Russell King <linux@armlinux.org.uk>, Arnd Bergmann <arnd@arndb.de>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 2/6] ARM: pagetable: prepare hardware page table to use large page
Date: Thu, 11 Jun 2020 15:49:10 +0200 [thread overview]
Message-ID: <20200611134914.765827-3-gregory.clement@bootlin.com> (raw)
In-Reply-To: <20200611134914.765827-1-gregory.clement@bootlin.com>
With 4 KB pages, each page table contained 512 entries in the hardware
page tables, and 512 entries in the Linux page tables, each of those
entries pointing to 4 KB page.
With larger page sizes being emulated, the hardware page tables will
continue to contain 512 entries, as we keep using 4 KB pages at the MMU
level. Hence PTE_HWTABLE_PTRS is changed to 512. However, the number of
Linux page tables entries will vary depending on the page size: 512
entries with 4 KB pages, 256 entries with 8 KB pages, 128 entries with
16 KB pages, etc.
In the case of 4K pages, this patch doesn't modify the values being
used.
This is inspired from fa0ca2726ea9 ("DSMP 64K support") and
4ef803e12baf ("mmu: large-page: Added support for multiple kernel page
sizes") from
https://github.com/MarvellEmbeddedProcessors/linux-marvell.git
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---
arch/arm/include/asm/pgtable-2level.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/include/asm/pgtable-2level.h b/arch/arm/include/asm/pgtable-2level.h
index 9e084a464a97..6316ef4a9f5c 100644
--- a/arch/arm/include/asm/pgtable-2level.h
+++ b/arch/arm/include/asm/pgtable-2level.h
@@ -67,13 +67,13 @@
* until either the TLB entry is evicted under pressure, or a context
* switch which changes the user space mapping occurs.
*/
-#define PTRS_PER_PTE 512
+#define PTRS_PER_PTE (512 >> (PAGE_SHIFT-12))
#define PTRS_PER_PMD 1
#define PTRS_PER_PGD 2048
-#define PTE_HWTABLE_PTRS (PTRS_PER_PTE)
+#define PTE_HWTABLE_PTRS (512)
#define PTE_HWTABLE_OFF (PTE_HWTABLE_PTRS * sizeof(pte_t))
-#define PTE_HWTABLE_SIZE (PTRS_PER_PTE * sizeof(u32))
+#define PTE_HWTABLE_SIZE (PTE_HWTABLE_PTRS * sizeof(u32))
/*
* PMD_SHIFT determines the size of the area a second-level page table can map
--
2.26.2
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next prev parent reply other threads:[~2020-06-11 13:49 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-11 13:49 [PATCH v2 0/6] ARM: Add support for large kernel page (from 8K to 64K) Gregory CLEMENT
2020-06-11 13:49 ` [PATCH v2 1/6] ARM: Use PAGE_SIZE for ELF_EXEC_PAGESIZE Gregory CLEMENT
2020-06-12 8:22 ` Arnd Bergmann
2020-06-12 8:35 ` Russell King - ARM Linux admin
2020-06-12 8:46 ` Arnd Bergmann
2020-06-12 8:50 ` Russell King - ARM Linux admin
2020-06-12 11:50 ` Catalin Marinas
2020-06-12 12:06 ` Gregory CLEMENT
2020-06-12 8:52 ` Gregory CLEMENT
2020-06-11 13:49 ` Gregory CLEMENT [this message]
2020-06-11 13:49 ` [PATCH v2 3/6] ARM: Make the number of fix bitmap depend on the page size Gregory CLEMENT
2020-06-11 13:49 ` [PATCH v2 4/6] ARM: mm: Aligned pte allocation to one page Gregory CLEMENT
2020-06-12 8:37 ` Arnd Bergmann
2020-06-12 10:25 ` Catalin Marinas
2020-06-12 11:56 ` Gregory CLEMENT
2020-06-11 13:49 ` [PATCH v2 5/6] ARM: Add large kernel page support Gregory CLEMENT
2020-06-11 13:49 ` [PATCH v2 6/6] ARM: Add 64K page support at MMU level Gregory CLEMENT
2020-06-11 16:21 ` [PATCH v2 0/6] ARM: Add support for large kernel page (from 8K to 64K) Russell King - ARM Linux admin
2020-06-12 9:15 ` Gregory CLEMENT
2020-06-12 9:23 ` Arnd Bergmann
2020-06-12 12:21 ` Catalin Marinas
2020-06-12 12:49 ` Arnd Bergmann
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