linux-arm-kernel.lists.infradead.org archive mirror
 help / color / mirror / Atom feed
From: Thierry Reding <thierry.reding@gmail.com>
To: Dmitry Osipenko <digetx@gmail.com>
Cc: linux-tegra@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Jon Hunter <jonathanh@nvidia.com>
Subject: Re: [PATCH 12/73] ARM: tegra: Drop display controller parent clocks on Tegra114
Date: Thu, 25 Jun 2020 09:37:36 +0200	[thread overview]
Message-ID: <20200625073736.GA2800220@ulmo> (raw)
In-Reply-To: <0bc2ec0e-f863-207a-d61b-058503598139@gmail.com>


[-- Attachment #1.1: Type: text/plain, Size: 7779 bytes --]

On Wed, Jun 24, 2020 at 07:19:26PM +0300, Dmitry Osipenko wrote:
> 16.06.2020 16:51, Thierry Reding пишет:
> > From: Thierry Reding <treding@nvidia.com>
> > 
> > The parent clocks are determined by the output that will be used, not by
> > the display controller that drives the output. Drop the parent clocks
> > from the display controller device tree nodes.
> > 
> > Signed-off-by: Thierry Reding <treding@nvidia.com>
> > ---
> >  arch/arm/boot/dts/tegra114.dtsi | 10 ++++------
> >  arch/arm/boot/dts/tegra124.dtsi | 10 ++++------
> >  arch/arm/boot/dts/tegra20.dtsi  | 10 ++++------
> >  arch/arm/boot/dts/tegra30.dtsi  | 10 ++++------
> >  4 files changed, 16 insertions(+), 24 deletions(-)
> > 
> > diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi
> > index a06b88b01ef3..23df7a5f37d3 100644
> > --- a/arch/arm/boot/dts/tegra114.dtsi
> > +++ b/arch/arm/boot/dts/tegra114.dtsi
> > @@ -59,9 +59,8 @@ dc@54200000 {
> >  			compatible = "nvidia,tegra114-dc";
> >  			reg = <0x54200000 0x00040000>;
> >  			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA114_CLK_DISP1>,
> > -				 <&tegra_car TEGRA114_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA114_CLK_DISP1>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 27>;
> >  			reset-names = "dc";
> >  
> > @@ -78,9 +77,8 @@ dc@54240000 {
> >  			compatible = "nvidia,tegra114-dc";
> >  			reg = <0x54240000 0x00040000>;
> >  			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA114_CLK_DISP2>,
> > -				 <&tegra_car TEGRA114_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA114_CLK_DISP2>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 26>;
> >  			reset-names = "dc";
> >  
> > diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
> > index 1afed8496c95..2c992e8e3594 100644
> > --- a/arch/arm/boot/dts/tegra124.dtsi
> > +++ b/arch/arm/boot/dts/tegra124.dtsi
> > @@ -105,9 +105,8 @@ dc@54200000 {
> >  			compatible = "nvidia,tegra124-dc";
> >  			reg = <0x0 0x54200000 0x0 0x00040000>;
> >  			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA124_CLK_DISP1>,
> > -				 <&tegra_car TEGRA124_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA124_CLK_DISP1>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 27>;
> >  			reset-names = "dc";
> >  
> > @@ -120,9 +119,8 @@ dc@54240000 {
> >  			compatible = "nvidia,tegra124-dc";
> >  			reg = <0x0 0x54240000 0x0 0x00040000>;
> >  			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA124_CLK_DISP2>,
> > -				 <&tegra_car TEGRA124_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA124_CLK_DISP2>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 26>;
> >  			reset-names = "dc";
> >  
> > diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> > index f0a172c61b26..8b6909839f59 100644
> > --- a/arch/arm/boot/dts/tegra20.dtsi
> > +++ b/arch/arm/boot/dts/tegra20.dtsi
> > @@ -103,9 +103,8 @@ dc@54200000 {
> >  			compatible = "nvidia,tegra20-dc";
> >  			reg = <0x54200000 0x00040000>;
> >  			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA20_CLK_DISP1>,
> > -				 <&tegra_car TEGRA20_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA20_CLK_DISP1>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 27>;
> >  			reset-names = "dc";
> >  
> > @@ -120,9 +119,8 @@ dc@54240000 {
> >  			compatible = "nvidia,tegra20-dc";
> >  			reg = <0x54240000 0x00040000>;
> >  			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA20_CLK_DISP2>,
> > -				 <&tegra_car TEGRA20_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA20_CLK_DISP2>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 26>;
> >  			reset-names = "dc";
> >  
> > diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> > index 27000f0ba35b..23fedb76e5ae 100644
> > --- a/arch/arm/boot/dts/tegra30.dtsi
> > +++ b/arch/arm/boot/dts/tegra30.dtsi
> > @@ -200,9 +200,8 @@ dc@54200000 {
> >  			compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
> >  			reg = <0x54200000 0x00040000>;
> >  			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA30_CLK_DISP1>,
> > -				 <&tegra_car TEGRA30_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA30_CLK_DISP1>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 27>;
> >  			reset-names = "dc";
> >  
> > @@ -219,9 +218,8 @@ dc@54240000 {
> >  			compatible = "nvidia,tegra30-dc";
> >  			reg = <0x54240000 0x00040000>;
> >  			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
> > -			clocks = <&tegra_car TEGRA30_CLK_DISP2>,
> > -				 <&tegra_car TEGRA30_CLK_PLL_P>;
> > -			clock-names = "dc", "parent";
> > +			clocks = <&tegra_car TEGRA30_CLK_DISP2>;
> > +			clock-names = "dc";
> >  			resets = <&tegra_car 26>;
> >  			reset-names = "dc";
> >  
> > 
> 
> Hello Thierry,
> 
> Tegra DRM fails to probe after this change using next-20200624 on T20/30
> (T124 also should be broken):
> 
>  tegra-dc 54200000.dc: failed to get parent clock
>  tegra-dc 54200000.dc: failed to probe RGB output: -2

Indeed. I had completely missed that we used to have this RGB output on
prior chips and therefore do need the parent clock. As of Tegra124 that
RGB output is no longer present, so this isn't needed anymore.

> BTW, the commit's title is misleading since the patch touches all SoCs
> and not only the T114.

Good catch. I've replaced this with the following:

--- >8 ---
commit afd92390fcaa784a6d064f3b07c8d8124e43e5d1
Author: Thierry Reding <treding@nvidia.com>
Date:   Thu Jun 11 19:09:36 2020 +0200

    ARM: tegra: Drop display controller parent clocks on Tegra124
    
    The parent clocks are determined by the output that will be used, not by
    the display controller that drives the output. On previous generations a
    simple RGB output used to be part of the display controller and hence an
    explicit parent clock needed to be assigned to the display controller to
    drive the RGB output. Starting with Tegra124, that RGB output has been
    dropped and the parent clock can therefore be removed from the display
    controller device tree nodes.
    
    Signed-off-by: Thierry Reding <treding@nvidia.com>

diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi
index 1afed8496c95..2c992e8e3594 100644
--- a/arch/arm/boot/dts/tegra124.dtsi
+++ b/arch/arm/boot/dts/tegra124.dtsi
@@ -105,9 +105,8 @@ dc@54200000 {
 			compatible = "nvidia,tegra124-dc";
 			reg = <0x0 0x54200000 0x0 0x00040000>;
 			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&tegra_car TEGRA124_CLK_DISP1>,
-				 <&tegra_car TEGRA124_CLK_PLL_P>;
-			clock-names = "dc", "parent";
+			clocks = <&tegra_car TEGRA124_CLK_DISP1>;
+			clock-names = "dc";
 			resets = <&tegra_car 27>;
 			reset-names = "dc";
 
@@ -120,9 +119,8 @@ dc@54240000 {
 			compatible = "nvidia,tegra124-dc";
 			reg = <0x0 0x54240000 0x0 0x00040000>;
 			interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
-			clocks = <&tegra_car TEGRA124_CLK_DISP2>,
-				 <&tegra_car TEGRA124_CLK_PLL_P>;
-			clock-names = "dc", "parent";
+			clocks = <&tegra_car TEGRA124_CLK_DISP2>;
+			clock-names = "dc";
 			resets = <&tegra_car 26>;
 			reset-names = "dc";
--- >8 ---

Thierry

[-- Attachment #1.2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2020-06-25  7:40 UTC|newest]

Thread overview: 86+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-06-16 13:51 [PATCH 00/73] ARM: tegra: Various fixes for DT schema validation Thierry Reding
2020-06-16 13:51 ` [PATCH 01/73] ARM: tegra: Add missing clock-names for SDHCI on Tegra114 Thierry Reding
2020-06-16 13:51 ` [PATCH 02/73] ARM: tegra: Remove simple clocks bus Thierry Reding
2020-06-16 19:06   ` Jon Hunter
2020-06-17 14:21     ` Thierry Reding
2020-06-16 13:51 ` [PATCH 03/73] ARM: tegra: Remove simple regulators bus Thierry Reding
2020-06-16 19:24   ` Jon Hunter
2020-06-17 14:22     ` Thierry Reding
2020-06-16 13:51 ` [PATCH 04/73] ARM: tegra: Remove battery-name property Thierry Reding
2020-06-16 13:51 ` [PATCH 05/73] ARM: tegra: roth: Use the correct DSI/CSI supply Thierry Reding
2020-06-16 13:51 ` [PATCH 06/73] ARM: tegra: tn7: " Thierry Reding
2020-06-16 13:51 ` [PATCH 07/73] ARM: tegra: Do not mark host1x as simple bus Thierry Reding
2020-06-16 13:51 ` [PATCH 08/73] ARM: tegra: Add missing host1x properties Thierry Reding
2020-06-16 13:51 ` [PATCH 09/73] ARM: tegra: gr2d is not backwards-compatible Thierry Reding
2020-06-17 16:21   ` Dmitry Osipenko
2020-06-16 13:51 ` [PATCH 10/73] ARM: tegra: gr3d " Thierry Reding
2020-06-16 13:51 ` [PATCH 11/73] ARM: tegra: The Tegra114 DC " Thierry Reding
2020-06-16 13:51 ` [PATCH 12/73] ARM: tegra: Drop display controller parent clocks on Tegra114 Thierry Reding
2020-06-24 16:19   ` Dmitry Osipenko
2020-06-25  7:37     ` Thierry Reding [this message]
2020-06-25 14:18       ` Dmitry Osipenko
2020-06-16 13:51 ` [PATCH 13/73] ARM: tegra: Rename sdhci nodes to mmc Thierry Reding
2020-06-16 13:51 ` [PATCH 14/73] ARM: tegra: Tegra114 SDHCI is not backwards-compatible Thierry Reding
2020-06-16 13:51 ` [PATCH 15/73] ARM: tegra: Add missing #phy-cells property to USB PHYs Thierry Reding
2020-06-16 13:51 ` [PATCH 16/73] ARM: tegra: Add missing #sound-dai-cells property to codecs Thierry Reding
2020-06-16 13:51 ` [PATCH 17/73] ARM: tegra: Name GPIO hog nodes consistently Thierry Reding
2020-06-16 13:51 ` [PATCH 18/73] ARM: tegra: Use standard name for Ethernet devices Thierry Reding
2020-06-16 13:51 ` [PATCH 19/73] ARM: tegra: Use proper tuple notation Thierry Reding
2020-06-16 13:51 ` [PATCH 20/73] ARM: tegra: Add micro-USB A/B port on Jetson TK1 Thierry Reding
2020-06-16 13:51 ` [PATCH 21/73] ARM: tegra: Add missing panel power supplies on Nyan Thierry Reding
2020-06-16 13:51 ` [PATCH 22/73] ARM: tegra: Add #reset-cells to Tegra124 memory controller Thierry Reding
2020-06-16 13:51 ` [PATCH 23/73] ARM: tegra: Fix order of XUSB controller clocks Thierry Reding
2020-06-16 13:51 ` [PATCH 24/73] ARM: tegra: Add missing clock-names for SDHCI controllers Thierry Reding
2020-06-16 13:51 ` [PATCH 25/73] ARM: tegra: Use proper unit-addresses for OPPs Thierry Reding
2020-06-16 13:51 ` [PATCH 26/73] ARM: tegra: medcom-wide: Remove extra panel power supply Thierry Reding
2020-06-16 13:51 ` [PATCH 27/73] ARM: tegra: Use numeric unit-addresses Thierry Reding
2020-06-16 13:51 ` [PATCH 28/73] ARM: tegra: Use standard names for LED nodes Thierry Reding
2020-06-16 13:51 ` [PATCH 29/73] ARM: tegra: seaboard: Use standard battery bindings Thierry Reding
2020-06-16 13:51 ` [PATCH 30/73] ARM: tegra: Use standard names for SRAM nodes Thierry Reding
2020-06-16 13:51 ` [PATCH 31/73] ARM: tegra: Add parent clock to DSI output Thierry Reding
2020-06-16 13:51 ` [PATCH 32/73] ARM: tegra: Remove spurious comma from node name Thierry Reding
2020-06-16 13:51 ` [PATCH 33/73] ARM: tegra: The Tegra30 DC is not backwards-compatible Thierry Reding
2020-06-16 13:51 ` [PATCH 34/73] ARM: tegra: The Tegra30 SDHCI " Thierry Reding
2020-06-16 13:52 ` [PATCH 35/73] arm64: tegra: Add missing #phy-cells property on Jetson TX2 Thierry Reding
2020-06-16 13:52 ` [PATCH 36/73] arm64: tegra: Add missing #phy-cells property on Jetson AGX Xavier Thierry Reding
2020-06-16 13:52 ` [PATCH 37/73] arm64: tegra: Fix #address-cells/#size-cells for SRAM on Tegra186 Thierry Reding
2020-06-16 13:52 ` [PATCH 38/73] arm64: tegra: Use standard notation for interrupts Thierry Reding
2020-06-16 13:52 ` [PATCH 39/73] arm64: tegra: Remove extra compatible for Tegra194 SDHCI Thierry Reding
2020-06-16 13:52 ` [PATCH 40/73] arm64: tegra: Remove extra compatible for Tegra210 SDHCI Thierry Reding
2020-06-16 13:52 ` [PATCH 41/73] arm64: tegra: Describe interconnect paths on Tegra186 Thierry Reding
2020-06-16 13:52 ` [PATCH 42/73] arm64: tegra: Describe interconnect paths on Tegra194 Thierry Reding
2020-06-16 13:52 ` [PATCH 43/73] arm64: tegra: Add interrupt for Tegra194 memory controller Thierry Reding
2020-06-16 13:52 ` [PATCH 44/73] arm64: tegra: Add Tegra132 compatible string for host1x Thierry Reding
2020-06-16 13:52 ` [PATCH 45/73] arm64: tegra: Add interrupt-names " Thierry Reding
2020-06-16 13:52 ` [PATCH 46/73] arm64: tegra: Remove parent clock from display controllers Thierry Reding
2020-06-16 13:52 ` [PATCH 47/73] arm64: tegra: Fixup I/O and PLL supply names for HDMI/DP Thierry Reding
2020-06-16 13:52 ` [PATCH 48/73] arm64: tegra: Add unit-address to memory node Thierry Reding
2020-06-16 13:52 ` [PATCH 49/73] arm64: tegra: Rename sdhci nodes to mmc Thierry Reding
2020-06-16 13:52 ` [PATCH 50/73] arm64: tegra: Enable XUSB on Norrin Thierry Reding
2020-06-16 13:52 ` [PATCH 51/73] arm64: tegra: Remove undocumented battery-name property Thierry Reding
2020-06-16 13:52 ` [PATCH 52/73] arm64: tegra: Remove simple clocks bus Thierry Reding
2020-06-30 11:13   ` Jon Hunter
2020-06-30 11:16     ` Jon Hunter
2020-06-16 13:52 ` [PATCH 53/73] arm64: tegra: Remove simple regulators bus Thierry Reding
2020-06-30 11:11   ` Jon Hunter
2020-06-30 11:16     ` Jon Hunter
2020-06-16 13:52 ` [PATCH 54/73] arm64: tegra: norrin: Add missing panel power supply Thierry Reding
2020-06-16 13:52 ` [PATCH 55/73] arm64: tegra: Use proper tuple notation Thierry Reding
2020-06-16 13:52 ` [PATCH 56/73] arm64: tegra: Do not mark host1x as simple bus Thierry Reding
2020-06-16 13:52 ` [PATCH 57/73] arm64: tegra: Use sor0_out clock on Tegra132 Thierry Reding
2020-06-16 13:52 ` [PATCH 58/73] arm64: tegra: Tegra132 EMC is not compatible with Tegra124 Thierry Reding
2020-06-16 13:52 ` [PATCH 59/73] arm64: tegra: Add missing #phy-cells property to USB PHYs Thierry Reding
2020-06-16 13:52 ` [PATCH 60/73] arm64: tegra: Remove unneeded power supplies Thierry Reding
2020-06-16 13:52 ` [PATCH 61/73] arm64: tegra: Update USB connector nodes Thierry Reding
2020-06-16 13:52 ` [PATCH 62/73] arm64: tegra: Use standard EEPROM properties Thierry Reding
2020-06-16 13:52 ` [PATCH 63/73] arm64: tegra: Remove XUSB pad controller interrupt from XUSB node Thierry Reding
2020-06-16 13:52 ` [PATCH 64/73] arm64: tegra: Fix {clock,reset}-names ordering Thierry Reding
2020-06-16 13:52 ` [PATCH 65/73] arm64: tegra: Do not mark display hub as simple bus Thierry Reding
2020-06-16 13:52 ` [PATCH 66/73] arm64: tegra: Use standard names for SRAM nodes Thierry Reding
2020-06-16 13:52 ` [PATCH 67/73] arm64: tegra: Remove unused interrupts from Tegra194 AON GPIO Thierry Reding
2020-06-16 13:52 ` [PATCH 68/73] arm64: tegra: Fix indentation in Tegra194 device tree Thierry Reding
2020-06-16 13:52 ` [PATCH 69/73] arm64: tegra: Rename agic -> interrupt-controller Thierry Reding
2020-06-16 13:52 ` [PATCH 70/73] arm64: tegra: Various fixes for PMICs Thierry Reding
2020-06-16 13:52 ` [PATCH 71/73] arm64: tegra: Sort nodes by unit-address on Jetson Nano Thierry Reding
2020-06-16 13:52 ` [PATCH 72/73] arm64: tegra: Rename cbb@0 to bus@0 on Tegra194 Thierry Reding
2020-06-16 13:52 ` [PATCH 73/73] arm64: tegra: Fix order of XUSB controller clocks Thierry Reding

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20200625073736.GA2800220@ulmo \
    --to=thierry.reding@gmail.com \
    --cc=digetx@gmail.com \
    --cc=jonathanh@nvidia.com \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-tegra@vger.kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).