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Tue, 07 Jul 2020 08:01:26 -0700 (PDT) Date: Tue, 7 Jul 2020 17:01:14 +0200 From: Jean-Philippe Brucker To: Robin Murphy Subject: Re: [RFC PATCH v1 2/2] perf/smmuv3: To support the dts to get options Message-ID: <20200707150114.GC159413@myrica> References: <20200706112246.92220-1-jkchen@linux.alibaba.com> <20200706112246.92220-3-jkchen@linux.alibaba.com> <024231fc-cf6e-6785-5153-2e7f45496911@arm.com> MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="k1lZvvs/B4yU6o8G" Content-Disposition: inline In-Reply-To: <024231fc-cf6e-6785-5153-2e7f45496911@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200707_110128_613855_22BC5BAF X-CRM114-Status: GOOD ( 21.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, will@kernel.org, Jay Chen , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org --k1lZvvs/B4yU6o8G Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Hi, On Mon, Jul 06, 2020 at 04:03:34PM +0100, Robin Murphy wrote: > On 2020-07-06 12:22, Jay Chen wrote: > > For the smmuv3 pmu for support the dts to get the > > options > > > > Signed-off-by: Jay Chen [...] > > +static const struct of_device_id smmu_pmu_of_match[] = { > > + { .compatible = "arm-smmu-v3-pmcg", }, > > Please define the DT binding first. IIRC Jean-Philippe wrote some patches a > while back that never got posted, but I suppose it should be YAML now... Yes, I've never followed through with that because it only supported the RevC FastModel with non-default model parameters. I attached the binding I currently have, converted to YAML. Thanks, Jean --k1lZvvs/B4yU6o8G Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="0001-dt-bindings-Add-SMMUv3-PMCG-binding.patch" >From b117e5b4ce96a5a8327333ab408cf61200850d4f Mon Sep 17 00:00:00 2001 From: Jean-Philippe Brucker Date: Tue, 7 Jul 2020 16:55:16 +0200 Subject: [PATCH] dt-bindings: Add SMMUv3 PMCG binding Add binding for the SMMUv3 PMU. Each node represents a PMCG, and is placed as a sibling node of the SMMU. As PMCGs are mainly implementation defined there is no 1-1 relation between SMMU and PMCG. The SMMU could have PMU counters for the TCU and each TBU, or a single PMCG. TODO: although the Linux implementation doesn't need them, it'd be nice to have links from the PMCG node to its associated SMMU. IORT does offer this (Node reference) and perhaps it could later help users figure out which PMCG is which on systems with dozens of SMMU. Signed-off-by: Jean-Philippe Brucker --- .../bindings/iommu/arm,smmu-v3-pmcg.yaml | 58 +++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 Documentation/devicetree/bindings/iommu/arm,smmu-v3-pmcg.yaml diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3-pmcg.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3-pmcg.yaml new file mode 100644 index 000000000000..23190a617e7e --- /dev/null +++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3-pmcg.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iommu/arm,smmu-v3-pmcg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM SMMUv3 Performance Monitor Counter Group + +maintainers: + - Will Deacon + - Robin Murphy + +description: |+ + An SMMUv3 may have several Performance Monitor Counter Group (PMCG). + They are standalone performance monitoring units that support both + architected and IMPLEMENTATION DEFINED event counters. + +properties: + $nodename: + pattern: "^smmu-pmcg@[0-9a-f]*" + compatible: + const: arm,smmu-v3-pmcg + + reg: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + + msi-parent: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - |+ + #include + #include + + tcu: smmu-pmcg@2b420000 { + compatible = "arm,smmu-v3-pmcg"; + reg = <0 0x2b420000 0 0x1000>, + <0 0x2b430000 0 0x1000>; + interrupts = ; + msi-parent = <&its 0xff0000>; + }; + + tbu0: smmu-pmcg@2b440000 { + compatible = "arm,smmu-v3-pmcg"; + reg = <0 0x2b440000 0 0x1000>, + <0 0x2b450000 0 0x1000>; + interrupts = ; + msi-parent = <&its 0xff0000>; + }; -- 2.27.0 --k1lZvvs/B4yU6o8G Content-Type: text/plain; charset="us-ascii" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit Content-Disposition: inline _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel --k1lZvvs/B4yU6o8G--