From: Rob Herring <email@example.com> To: Will Deacon <firstname.lastname@example.org>, Catalin Marinas <email@example.com> Cc: Mark Rutland <firstname.lastname@example.org>, Peter Zijlstra <email@example.com>, firstname.lastname@example.org, Arnaldo Carvalho de Melo <email@example.com>, Alexander Shishkin <firstname.lastname@example.org>, Raphael Gault <email@example.com>, Ingo Molnar <firstname.lastname@example.org>, Jonathan Cameron <Jonathan.Cameron@huawei.com>, Namhyung Kim <email@example.com>, Jiri Olsa <firstname.lastname@example.org>, email@example.com Subject: [PATCH 0/5] arm64: Enable access to pmu registers by user-space Date: Tue, 7 Jul 2020 14:53:28 -0600 [thread overview] Message-ID: <firstname.lastname@example.org> (raw) This is resurrecting Raphael's series to enable userspace counter access. The following changes have been made from the last version: The major change is support for heterogeneous systems with some restrictions. Specifically, userspace must pin itself to like CPUs, open a specific PMU by type, and use h/w specific events. The tests have been reworked to demonstrate this. Chained events are not supported. The problem with supporting chained events was there's no way to distinguish between a chained event and a native 64-bit counter. We could add some flag, but do self monitoring processes really need that? Native 64-bit counters are supported if the PMU h/w has support. As there's already an explicit ABI to request 64-bit counters, userspace can request 64-bit counters and if user access is not enabled, then it must retry with 32-bit counters. There was a bug in that pmc_width was not set in the user page. The tests now check for this. The documentation has been converted to rST. I've added sections on chained events and heterogeneous. The tests have been expanded to test the cycle counter access. Rob  https://email@example.com/ Raphael Gault (5): perf: arm64: Add tests to check userspace access to hardware counters arm64: pmu: Add hook to handle pmu-related undefined instructions arm64: pmu: Add function implementation to update event index in userpage arm64: perf: Enable pmu counter direct access for perf event on armv8 Documentation: arm64: Document PMU counters access from userspace Documentation/arm64/index.rst | 1 + .../arm64/perf_counter_user_access.rst | 52 ++ arch/arm64/include/asm/mmu.h | 6 + arch/arm64/include/asm/mmu_context.h | 2 + arch/arm64/include/asm/perf_event.h | 14 + arch/arm64/kernel/cpufeature.c | 4 +- arch/arm64/kernel/perf_event.c | 80 +++ drivers/perf/arm_pmu.c | 38 ++ include/linux/perf/arm_pmu.h | 2 + tools/perf/arch/arm64/include/arch-tests.h | 11 + tools/perf/arch/arm64/tests/Build | 1 + tools/perf/arch/arm64/tests/arch-tests.c | 12 + tools/perf/arch/arm64/tests/user-events.c | 454 ++++++++++++++++++ 13 files changed, 675 insertions(+), 2 deletions(-) create mode 100644 Documentation/arm64/perf_counter_user_access.rst create mode 100644 tools/perf/arch/arm64/tests/user-events.c -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list firstname.lastname@example.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2020-07-07 20:55 UTC|newest] Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-07-07 20:53 Rob Herring [this message] 2020-07-07 20:53 ` [PATCH 1/5] perf: arm64: Add tests to check userspace access to hardware counters Rob Herring 2020-07-07 20:53 ` [PATCH 2/5] arm64: pmu: Add hook to handle pmu-related undefined instructions Rob Herring 2020-07-07 20:53 ` [PATCH 3/5] arm64: pmu: Add function implementation to update event index in userpage Rob Herring 2020-07-07 20:53 ` [PATCH 4/5] arm64: perf: Enable pmu counter direct access for perf event on armv8 Rob Herring 2020-07-07 20:53 ` [PATCH 5/5] Documentation: arm64: Document PMU counters access from userspace Rob Herring
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