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[104.188.17.28]) by smtp.gmail.com with ESMTPSA id h15sm999974pjc.14.2020.07.08.22.01.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 08 Jul 2020 22:01:45 -0700 (PDT) From: Bjorn Andersson To: Will Deacon , Robin Murphy , Joerg Roedel , Thierry Reding , Laurentiu Tudor Subject: [PATCH 4/5] iommu/arm-smmu-qcom: Consstently initialize stream mappings Date: Wed, 8 Jul 2020 22:01:44 -0700 Message-Id: <20200709050145.3520931-5-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200709050145.3520931-1-bjorn.andersson@linaro.org> References: <20200709050145.3520931-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200709_010150_336553_ABB9AB84 X-CRM114-Status: GOOD ( 16.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arm-msm@vger.kernel.org, iommu@lists.linux-foundation.org, Jonathan Marek , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Firmware that traps writes to S2CR to translate BYPASS into FAULT also ignores writes of type FAULT. As such booting with "disable_bypass" set will result in all S2CR registers left as configured by the bootloader. This has been seen to result in indeterministic results, as these mappings might linger and reference context banks that Linux is reconfiguring. Use the fact that BYPASS writes result in FAULT type to force all stream mappings to FAULT. Signed-off-by: Bjorn Andersson --- drivers/iommu/arm-smmu-qcom.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/iommu/arm-smmu-qcom.c b/drivers/iommu/arm-smmu-qcom.c index e8a36054e912..86b1917459a4 100644 --- a/drivers/iommu/arm-smmu-qcom.c +++ b/drivers/iommu/arm-smmu-qcom.c @@ -27,6 +27,7 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) { unsigned int last_s2cr = ARM_SMMU_GR0_S2CR(smmu->num_mapping_groups - 1); u32 reg; + int i; /* * With some firmware writes to S2CR of type FAULT are ignored, and @@ -37,9 +38,24 @@ static int qcom_smmu_cfg_probe(struct arm_smmu_device *smmu) FIELD_PREP(ARM_SMMU_S2CR_CBNDX, 0xff) | FIELD_PREP(ARM_SMMU_S2CR_PRIVCFG, S2CR_PRIVCFG_DEFAULT)); reg = arm_smmu_gr0_read(smmu, last_s2cr); - if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) + if (FIELD_GET(ARM_SMMU_S2CR_TYPE, reg) != S2CR_TYPE_BYPASS) { smmu->qcom_bypass_quirk = true; + /* + * With firmware ignoring writes of type FAULT, booting the + * Linux kernel with disable_bypass disabled (i.e. "enable + * bypass") the initialization during probe will leave mappings + * in an inconsistent state. Avoid this by configuring all + * S2CRs to BYPASS. + */ + for (i = 0; i < smmu->num_mapping_groups; i++) { + smmu->s2crs[i].type = S2CR_TYPE_BYPASS; + smmu->s2crs[i].privcfg = S2CR_PRIVCFG_DEFAULT; + smmu->s2crs[i].cbndx = 0xff; + smmu->s2crs[i].count = 0; + } + } + return 0; } -- 2.26.2 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel