From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6F814C433DF for ; Fri, 10 Jul 2020 14:21:58 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3BF7220674 for ; Fri, 10 Jul 2020 14:21:58 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="PRywLkAc" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3BF7220674 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=8bytes.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=harqO8MGXWowW4NyO/L8iL9pWTI2iR678Lwp6LbYeXg=; b=PRywLkAcB/VsQzHWwGJpe9S0W ck9C6LDSEgizokwywWN5vP2wdwjCn1JPqSbqC4vbOLCGpy0d+tB+Y3qCISB6cUM0BjDBlR4OKp43x Vwv+E16dTXCFQ3hjdxGkNmhtRZbiyZX8fR3LrlddP8wxpUGm+3U+FiCIaQF4REhYFZ9CQVF0hsWfO aABi9SkpwNZN8UCNqC44otFZMNmcYF9orCOEfLvuxBl/yTAFE1VQommzi30umBJL84NuDYA1gOPZZ u8yu0kwkEimp3FW63aGnNrdo6+KJbEU6OGFEKe6ziK3U7gG+m0y8OaKig7PDUSCeFi65WshiI6q0V S33IGPwVQ==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtttL-0001Gn-Jd; Fri, 10 Jul 2020 14:20:43 +0000 Received: from 8bytes.org ([2a01:238:4383:600:38bc:a715:4b6d:a889] helo=theia.8bytes.org) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jtttI-0001Fe-0s for linux-arm-kernel@lists.infradead.org; Fri, 10 Jul 2020 14:20:41 +0000 Received: by theia.8bytes.org (Postfix, from userid 1000) id 990CB20C; Fri, 10 Jul 2020 16:20:38 +0200 (CEST) Date: Fri, 10 Jul 2020 16:20:37 +0200 From: Joerg Roedel To: Robin Murphy Subject: Re: [PATCH 1/2] iommu/intel: Avoid SAC address trick for PCIe devices Message-ID: <20200710142037.GM27672@8bytes.org> References: MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200710_102040_173012_834D5727 X-CRM114-Status: GOOD ( 18.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org, jonathan.lemon@gmail.com, dwmw2@infradead.org, hch@lst.de, linux-arm-kernel@lists.infradead.org, baolu.lu@linux.intel.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 08, 2020 at 12:32:41PM +0100, Robin Murphy wrote: > For devices stuck behind a conventional PCI bus, saving extra cycles at > 33MHz is probably fairly significant. However since native PCI Express > is now the norm for high-performance devices, the optimisation to always > prefer 32-bit addresses for the sake of avoiding DAC is starting to look > rather anachronistic. Technically 32-bit addresses do have shorter TLPs > on PCIe, but unless the device is saturating its link bandwidth with > small transfers it seems unlikely that the difference is appreciable. > > What definitely is appreciable, however, is that the IOVA allocator > doesn't behave all that well once the 32-bit space starts getting full. > As DMA working sets get bigger, this optimisation increasingly backfires > and adds considerable overhead to the dma_map path for use-cases like > high-bandwidth networking. > > As such, let's simply take it out of consideration for PCIe devices. > Technically this might work out suboptimal for a PCIe device stuck > behind a conventional PCI bridge, or for PCI-X devices that also have > native 64-bit addressing, but neither of those are likely to be found > in performance-critical parts of modern systems. > > Signed-off-by: Robin Murphy > --- > drivers/iommu/intel/iommu.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Applied both, thanks. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel