From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,MENTIONS_GIT_HOSTING,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71F17C433E0 for ; Mon, 13 Jul 2020 17:00:43 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2F47220656 for ; Mon, 13 Jul 2020 17:00:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="f/5Rekl9" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2F47220656 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=qGwTsUD+Gr/pjnQ1FoRiM99eCcSnb62BhUYhsrGhhUU=; b=f/5Rekl9mDzoWPyoaGfAoXDxW Fr1tfmzGCcgJUuPTkmcgHOKQ76+Y+WtVlVMWcdbES3t1QAIKRCtOd/MDCeOOs6kEHfKhE2HyhKp9X ZWcYSZ7+LlgO3Lk7klC/e7+0vrwx0n+NWkDoQ9hbXxlZwmYaXGRE0EXnu7UDNMIbJWRQ32+TEw0ny 89E9Vu95hCXu3dr1JXwrdHqOccWxCA2DufKuzO4RoOehouujvvSJ3l7P2s/ySPKAQV9GddGkR+KTb pL3Z0tUTKt2LjRQDOecMbuebEAt3jsh/Y0FpgQGFaBLUkZBMHOjJ/lSTvgoULa1ISkLgK3TJEBbDq o6zDsCJUg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv1nN-0004Rg-N4; Mon, 13 Jul 2020 16:59:13 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jv1nK-0004R2-6o for linux-arm-kernel@lists.infradead.org; Mon, 13 Jul 2020 16:59:11 +0000 Received: from gaia (unknown [95.146.230.158]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1AA4B20738; Mon, 13 Jul 2020 16:59:06 +0000 (UTC) Date: Mon, 13 Jul 2020 17:59:04 +0100 From: Catalin Marinas To: Zhenyu Ye Subject: Re: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions Message-ID: <20200713165903.GD15829@gaia> References: <20200710094420.517-1-yezhenyu2@huawei.com> <159440712962.27784.4664678472466095995.b4-ty@arm.com> <20200713122123.GC15829@gaia> <2edcf1ce-38d4-82b2-e500-51f742cae357@huawei.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2edcf1ce-38d4-82b2-e500-51f742cae357@huawei.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200713_125910_367668_D6FBEBA3 X-CRM114-Status: GOOD ( 26.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, suzuki.poulose@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, steven.price@arm.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, guohanjun@huawei.com, olof@lixom.net, kuhn.chenqun@huawei.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Jul 13, 2020 at 08:41:31PM +0800, Zhenyu Ye wrote: > On 2020/7/13 20:21, Catalin Marinas wrote: > > On Fri, Jul 10, 2020 at 08:11:19PM +0100, Catalin Marinas wrote: > >> On Fri, 10 Jul 2020 17:44:18 +0800, Zhenyu Ye wrote: > >>> NOTICE: this series are based on the arm64 for-next/tlbi branch: > >>> git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux.git for-next/tlbi > >>> > >>> -- > >>> ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a > >>> range of input addresses. This series add support for this feature. > >>> > >>> [...] > >> > >> Applied to arm64 (for-next/tlbi), thanks! > >> > >> [1/2] arm64: tlb: Detect the ARMv8.4 TLBI RANGE feature > >> https://git.kernel.org/arm64/c/a2fd755f77ff > >> [2/2] arm64: tlb: Use the TLBI RANGE feature in arm64 > >> https://git.kernel.org/arm64/c/db34a081d273 > > > > I'm dropping these two patches from for-next/tlbi and for-next/core. > > They need a check on whether binutils supports the new "tlbi rva*" > > instructions, otherwise the build mail fail. > > > > I kept the latest incarnation of these patches on devel/tlbi-range for > > reference. > > Should we add a check for the binutils version? Just like: > > diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig > index fad573883e89..d5fb6567e0d2 100644 > --- a/arch/arm64/Kconfig > +++ b/arch/arm64/Kconfig > @@ -1300,6 +1300,20 @@ config ARM64_AMU_EXTN > correctly reflect reality. Most commonly, the value read will be 0, > indicating that the counter is not enabled. > > +config ARM64_TLBI_RANGE > + bool "Enable support for tlbi range feature" > + default y > + depends on AS_HAS_TLBI_RANGE > + help > + ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a > + range of input addresses. > + > + The feature introduces new assembly instructions, and they were > + support when binutils >= 2.30. It looks like 2.30. I tracked it down to this commit: https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=793a194839bc8add71fdc7429c58b10f0667a6f6;hp=1a7ed57c840dcb0401f1a67c6763a89f7d2686d2 > +config AS_HAS_TLBI_RANGE > + def_bool $(as-option, -Wa$(comma)-march=armv8.4-a) > + > endmenu The problem is that we don't pass -Wa,-march=armv8.4-a to gas. AFAICT, we only set an 8.3 for PAC but I'm not sure how passing two such options goes. I'm slightly surprised that my toolchains (and yours) did not complain about these instructions. Looking at the binutils code, I think it should have complained if -march=armv8.4-a wasn't passed but works fine. I thought gas doesn't enable the maximum arch feature by default. An alternative would be to check for a specific instruction (untested): def_bool $(as-instr,tlbi rvae1is, x0) but we need to figure out whether gas not requiring -march=armv8.4-a is a bug (which may be fixed) or that gas accepts all TLBI instructions. A safer bet may be to simply encode the instructions by hand: #define SYS_TLBI_RVAE1IS(Rt) \ __emit_inst(0xd5000000 | sys_insn(1, 0, 8, 2, 1) | ((Rt) & 0x1f)) #define SYS_TLBI_RVALE1IS(Rt) \ __emit_inst(0xd5000000 | sys_insn(1, 0, 8, 2, 5) | ((Rt) & 0x1f)) (please check that they are correct) -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel