From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-5.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id ECF58C433E0 for ; Tue, 14 Jul 2020 16:00:17 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A09D02065D for ; Tue, 14 Jul 2020 16:00:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="YYBWwlg6" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org A09D02065D Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=LbLEfEJiTNq4nJNQpqXLUbqh+XsCnDPJ2RCgSpgAqXg=; b=YYBWwlg68mKNyGYe3Cij6mjlM QlEL1r0f1GDcXdrbjha0qsa24Cq1dxti+Gn3WXgBWdu/LpgaPkRE/adko06Niq3d4huNmU5uw/T91 X6VNxOwTMvqhzgxj5o8wUveoUATkbLvPckXDKQDScvtwF2369iFIruW3QDSXgl69qRECGqDKhgKLL nJFhmSRXj7kzP3dPjWYw3Byk+KYYVyKnKpXDzu5Gvd39+cH2C8LfTcI45J0X2O1ys81H+YfHbV6PZ NEbSGSoSEsbmAhgJblJZHL36nPKdvK0QPl6i61dUI5ffFuX5v7wCtV9Df2kCKp2lLdbqe2dyPEw5c QOCc7GUtA==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvNKV-0004vd-It; Tue, 14 Jul 2020 15:58:51 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1jvNKS-0004uJ-2G for linux-arm-kernel@lists.infradead.org; Tue, 14 Jul 2020 15:58:49 +0000 Received: from gaia (unknown [95.146.230.158]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 93708223C6; Tue, 14 Jul 2020 15:58:43 +0000 (UTC) Date: Tue, 14 Jul 2020 16:58:41 +0100 From: Catalin Marinas To: Zhenyu Ye Subject: Re: [PATCH v2 0/2] arm64: tlb: add support for TLBI RANGE instructions Message-ID: <20200714155840.GE18793@gaia> References: <20200710094420.517-1-yezhenyu2@huawei.com> <159440712962.27784.4664678472466095995.b4-ty@arm.com> <20200713122123.GC15829@gaia> <2edcf1ce-38d4-82b2-e500-51f742cae357@huawei.com> <20200713165903.GD15829@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200714_115848_437033_F9CDBE88 X-CRM114-Status: GOOD ( 24.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-arch@vger.kernel.org, suzuki.poulose@arm.com, maz@kernel.org, linux-kernel@vger.kernel.org, xiexiangyou@huawei.com, steven.price@arm.com, zhangshaokun@hisilicon.com, linux-mm@kvack.org, arm@kernel.org, prime.zeng@hisilicon.com, guohanjun@huawei.com, olof@lixom.net, kuhn.chenqun@huawei.com, will@kernel.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Jul 14, 2020 at 11:17:01PM +0800, Zhenyu Ye wrote: > On 2020/7/14 0:59, Catalin Marinas wrote: > >> +config ARM64_TLBI_RANGE > >> + bool "Enable support for tlbi range feature" > >> + default y > >> + depends on AS_HAS_TLBI_RANGE > >> + help > >> + ARMv8.4-TLBI provides TLBI invalidation instruction that apply to a > >> + range of input addresses. > >> + > >> + The feature introduces new assembly instructions, and they were > >> + support when binutils >= 2.30. > > > > It looks like 2.30. I tracked it down to this commit: > > > > https://sourceware.org/git/?p=binutils-gdb.git;a=commitdiff;h=793a194839bc8add71fdc7429c58b10f0667a6f6;hp=1a7ed57c840dcb0401f1a67c6763a89f7d2686d2 > > > >> +config AS_HAS_TLBI_RANGE > >> + def_bool $(as-option, -Wa$(comma)-march=armv8.4-a) You could make this more generic like AS_HAS_ARMV8_4. > > The problem is that we don't pass -Wa,-march=armv8.4-a to gas. AFAICT, > > we only set an 8.3 for PAC but I'm not sure how passing two such options > > goes. > > Pass the -march twice may not have bad impact. Test in my toolchains > and the newer one will be chosen. Anyway, we can add judgment to avoid > them be passed at the same time. I think the last one always overrides the previous (same with the .arch statements in asm files). For example: echo "paciasp" | aarch64-none-linux-gnu-as -march=armv8.2-a -march=armv8.3-a succeeds but the one below fails: echo "paciasp" | aarch64-none-linux-gnu-as -march=armv8.3-a -march=armv8.2-a > > A safer bet may be to simply encode the instructions by hand: > > > > #define SYS_TLBI_RVAE1IS(Rt) \ > > __emit_inst(0xd5000000 | sys_insn(1, 0, 8, 2, 1) | ((Rt) & 0x1f)) > > #define SYS_TLBI_RVALE1IS(Rt) \ > > __emit_inst(0xd5000000 | sys_insn(1, 0, 8, 2, 5) | ((Rt) & 0x1f)) > > > > (please check that they are correct) > > Currently in kernel, all tlbi instructions are passed through __tlbi() > and __tlbi_user(). If we encode the range instructions by hand, we may > should have to add a new mechanism for this: > > 1. choose a register and save it; > 2. put the operations for tlbi range to the register; > 3. do tlbi range by asm(SYS_TLBI_RVAE1IS(x0)); > 4. restore the value of the register. > > It's complicated and will only be used with tlbi range instructions. > (Am I understand something wrong? ) > > So I am prefer to pass -march=armv8.4-a to toolschains to support tlbi > range instruction, just like what PAC does. It will indeed get more complicated than necessary. So please go with the -Wa,-march=armv8.4-a check in Kconfig and update the arch/arm64/Makefile to pass this option (after the 8.3 one). Thanks. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel