From: chuanjia.liu <Chuanjia.Liu@mediatek.com>
To: Rob Herring <robh+dt@kernel.org>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: devicetree@vger.kernel.org, Ryder Lee <ryder.lee@mediatek.com>,
"chuanjia.liu" <Chuanjia.Liu@mediatek.com>,
linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
jianjun.wang@mediatek.com, linux-mediatek@lists.infradead.org,
yong.wu@mediatek.com, Bjorn Helgaas <bhelgaas@google.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 2/4] PCI: mediatek: Use regmap to get shared pcie-cfg base
Date: Tue, 21 Jul 2020 15:49:13 +0800 [thread overview]
Message-ID: <20200721074915.14516-3-Chuanjia.Liu@mediatek.com> (raw)
In-Reply-To: <20200721074915.14516-1-Chuanjia.Liu@mediatek.com>
Use regmap to get shared pcie-cfg base and change
the method to get pcie irq.
Acked-by:Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: chuanjia.liu <Chuanjia.Liu@mediatek.com>
---
drivers/pci/controller/pcie-mediatek.c | 25 ++++++++++++++++++-------
1 file changed, 18 insertions(+), 7 deletions(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c
index ebfa7d5a4e2d..659ff9a685b0 100644
--- a/drivers/pci/controller/pcie-mediatek.c
+++ b/drivers/pci/controller/pcie-mediatek.c
@@ -14,6 +14,7 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/irqdomain.h>
#include <linux/kernel.h>
+#include <linux/mfd/syscon.h>
#include <linux/msi.h>
#include <linux/module.h>
#include <linux/of_address.h>
@@ -23,6 +24,7 @@
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
+#include <linux/regmap.h>
#include <linux/reset.h>
#include "../pci.h"
@@ -205,6 +207,7 @@ struct mtk_pcie_port {
* struct mtk_pcie - PCIe host information
* @dev: pointer to PCIe device
* @base: IO mapped register base
+ * @cfg: IO mapped register map for PCIe config
* @free_ck: free-run reference clock
* @mem: non-prefetchable memory resource
* @ports: pointer to PCIe port information
@@ -214,6 +217,7 @@ struct mtk_pcie_port {
struct mtk_pcie {
struct device *dev;
void __iomem *base;
+ struct regmap *cfg;
struct clk *free_ck;
struct list_head ports;
@@ -650,7 +654,7 @@ static int mtk_pcie_setup_irq(struct mtk_pcie_port *port,
return err;
}
- port->irq = platform_get_irq(pdev, port->slot);
+ port->irq = platform_get_irq_byname(pdev, "pcie_irq");
if (port->irq < 0)
return port->irq;
@@ -676,12 +680,11 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port)
if (!mem)
return -EINVAL;
- /* MT7622 platforms need to enable LTSSM and ASPM from PCIe subsys */
- if (pcie->base) {
- val = readl(pcie->base + PCIE_SYS_CFG_V2);
- val |= PCIE_CSR_LTSSM_EN(port->slot) |
- PCIE_CSR_ASPM_L1_EN(port->slot);
- writel(val, pcie->base + PCIE_SYS_CFG_V2);
+ /* MT7622/MT7629 platforms need to enable LTSSM and ASPM. */
+ if (pcie->cfg) {
+ val = PCIE_CSR_LTSSM_EN(port->slot) |
+ PCIE_CSR_ASPM_L1_EN(port->slot);
+ regmap_update_bits(pcie->cfg, PCIE_SYS_CFG_V2, val, val);
}
/* Assert all reset signals */
@@ -987,6 +990,7 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
struct device *dev = pcie->dev;
struct platform_device *pdev = to_platform_device(dev);
struct resource *regs;
+ struct device_node *cfg_node;
int err;
/* get shared registers, which are optional */
@@ -999,6 +1003,13 @@ static int mtk_pcie_subsys_powerup(struct mtk_pcie *pcie)
}
}
+ cfg_node = of_parse_phandle(dev->of_node, "mediatek,pcie-cfg", 0);
+ if (cfg_node) {
+ pcie->cfg = syscon_node_to_regmap(cfg_node);
+ if (IS_ERR(pcie->cfg))
+ return PTR_ERR(pcie->cfg);
+ }
+
pcie->free_ck = devm_clk_get(dev, "free_ck");
if (IS_ERR(pcie->free_ck)) {
if (PTR_ERR(pcie->free_ck) == -EPROBE_DEFER)
--
2.18.0
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next prev parent reply other threads:[~2020-07-21 7:52 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-21 7:49 [PATCH v4 0/4] Split PCIe node to comply with hardware design chuanjia.liu
2020-07-21 7:49 ` [PATCH v4 1/4] dt-bindings: pci: mediatek: Modified the Device tree bindings chuanjia.liu
2020-07-21 7:49 ` chuanjia.liu [this message]
2020-07-21 7:49 ` [PATCH v4 3/4] arm64: dts: mediatek: Split PCIe node for MT2712 and MT7622 chuanjia.liu
2020-07-21 7:49 ` [PATCH v4 4/4] ARM: dts: mediatek: Modified MT7629 PCIe node chuanjia.liu
2020-08-03 7:46 ` [PATCH v4 0/4] Split PCIe node to comply with hardware design Chuanjia Liu
2020-09-08 6:13 ` Aw: " Frank Wunderlich
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