From: Leo Yan <leo.yan@linaro.org>
To: Wei Li <liwei391@huawei.com>
Cc: Mark Rutland <mark.rutland@arm.com>,
Will Deacon <will@kernel.org>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Catalin Marinas <catalin.marinas@arm.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
linux-kernel@vger.kernel.org, zhangshaokun@hisilicon.com,
Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>, James Clark <james.clark@arm.com>,
guohanjun@huawei.com, Namhyung Kim <namhyung@kernel.org>,
Jiri Olsa <jolsa@redhat.com>,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 3/4] perf auxtrace: Add new itrace options for ARMv8.3-SPE
Date: Wed, 29 Jul 2020 14:51:48 +0800 [thread overview]
Message-ID: <20200729065148.GF4343@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <20200724091607.41903-4-liwei391@huawei.com>
On Fri, Jul 24, 2020 at 05:16:06PM +0800, Wei Li wrote:
> This patch is to add two options to synthesize events which are
> described as below:
>
> 'u': synthesize unaligned address access events
> 'v': synthesize partial/empty predicated SVE events
>
> This two options will be used by ARM SPE as their first consumer.
>
> Signed-off-by: Wei Li <liwei391@huawei.com>
> ---
> tools/perf/Documentation/itrace.txt | 2 ++
> tools/perf/util/auxtrace.c | 8 ++++++++
> tools/perf/util/auxtrace.h | 4 ++++
> 3 files changed, 14 insertions(+)
>
> diff --git a/tools/perf/Documentation/itrace.txt b/tools/perf/Documentation/itrace.txt
> index e817179c5027..25bcf3622709 100644
> --- a/tools/perf/Documentation/itrace.txt
> +++ b/tools/perf/Documentation/itrace.txt
> @@ -13,6 +13,8 @@
> m synthesize last level cache events
> t synthesize TLB events
> a synthesize remote access events
> + u synthesize unaligned address access events
> + v synthesize partial/empty predicated SVE events
> g synthesize a call chain (use with i or x)
> G synthesize a call chain on existing event records
> l synthesize last branch entries (use with i or x)
> diff --git a/tools/perf/util/auxtrace.c b/tools/perf/util/auxtrace.c
> index 25c639ac4ad4..2033eb3708ec 100644
> --- a/tools/perf/util/auxtrace.c
> +++ b/tools/perf/util/auxtrace.c
> @@ -1334,6 +1334,8 @@ void itrace_synth_opts__set_default(struct itrace_synth_opts *synth_opts,
> synth_opts->llc = true;
> synth_opts->tlb = true;
> synth_opts->remote_access = true;
> + synth_opts->alignment = true;
> + synth_opts->sve = true;
>
> if (no_sample) {
> synth_opts->period_type = PERF_ITRACE_PERIOD_INSTRUCTIONS;
> @@ -1507,6 +1509,12 @@ int itrace_parse_synth_opts(const struct option *opt, const char *str,
> case 'a':
> synth_opts->remote_access = true;
> break;
> + case 'u':
> + synth_opts->alignment = true;
> + break;
> + case 'v':
> + synth_opts->sve = true;
> + break;
> case ' ':
> case ',':
> break;
> diff --git a/tools/perf/util/auxtrace.h b/tools/perf/util/auxtrace.h
> index 142ccf7d34df..972df7b06b0d 100644
> --- a/tools/perf/util/auxtrace.h
> +++ b/tools/perf/util/auxtrace.h
> @@ -116,6 +116,8 @@ struct itrace_synth_opts {
> bool llc;
> bool tlb;
> bool remote_access;
> + bool alignment;
Patch 03 and 04 are directive, it's good for me.
The naming 'unalignment' would be more clear and avoid confusion.
> + bool sve;
> unsigned int callchain_sz;
> unsigned int last_branch_sz;
> unsigned long long period;
> @@ -617,6 +619,8 @@ bool auxtrace__evsel_is_auxtrace(struct perf_session *session,
> " m: synthesize last level cache events\n" \
> " t: synthesize TLB events\n" \
> " a: synthesize remote access events\n" \
> +" u: synthesize unaligned address access events\n" \
The 'unalignment' events are for 'unaligned address access and size of data'.
Otherwise, looks good to me:
Reviewed-by: Leo Yan <leo.yan@linaro.org>
Thanks,
Leo
> +" v: synthesize partial/empty predicated SVE events\n" \
> " g[len]: synthesize a call chain (use with i or x)\n" \
> " l[len]: synthesize last branch entries (use with i or x)\n" \
> " sNUMBER: skip initial number of events\n" \
> --
> 2.17.1
>
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next prev parent reply other threads:[~2020-07-29 6:53 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-24 9:16 [PATCH 0/4] Add support for ARMv8.3-SPE Wei Li
2020-07-24 9:16 ` [PATCH 1/4] drivers/perf: " Wei Li
2020-07-28 12:27 ` Leo Yan
2020-07-28 13:24 ` liwei (GF)
2020-07-29 7:08 ` Leo Yan
2020-07-29 9:12 ` Suzuki K Poulose
2020-07-30 8:14 ` Leo Yan
2020-07-31 12:18 ` liwei (GF)
2020-07-31 14:01 ` Suzuki K Poulose
2020-09-07 12:51 ` Will Deacon
2020-09-29 8:17 ` liwei (GF)
2020-07-24 9:16 ` [PATCH 2/4] perf: arm-spe: " Wei Li
2020-07-29 6:29 ` Leo Yan
2020-07-29 7:21 ` liwei (GF)
2020-07-29 7:28 ` Leo Yan
2020-07-29 7:42 ` liwei (GF)
2020-08-17 15:04 ` Leo Yan
2020-07-24 9:16 ` [PATCH 3/4] perf auxtrace: Add new itrace options " Wei Li
2020-07-29 6:51 ` Leo Yan [this message]
2020-07-24 9:16 ` [PATCH 4/4] perf: arm-spe: Synthesize new events " Wei Li
2020-07-28 12:06 ` [PATCH 0/4] Add support " Arnaldo Carvalho de Melo
2020-07-28 12:41 ` Leo Yan
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