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* [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
@ 2020-08-02 16:53 Sekhar Nori
  2020-08-27  4:43 ` Sekhar Nori
  2020-08-31 18:07 ` Nishanth Menon
  0 siblings, 2 replies; 8+ messages in thread
From: Sekhar Nori @ 2020-08-02 16:53 UTC (permalink / raw)
  To: Tero Kristo, Nishanth Menon
  Cc: Linux ARM Mailing List, Kishon Vijay Abraham I

Per errata i2104 documented in AM65x device errata document (TI document
number SPRZ452E, revised June 2019), Gen3 operation is not supported for
both PCIe Root Complex and Endpoint modes of operation.

See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf

Restrict speed to Gen2 to address the errata.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
---
 arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
index 61815228e230..22712d503290 100644
--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi
@@ -650,7 +650,7 @@
 		ti,syscon-pcie-mode = <&pcie0_mode>;
 		bus-range = <0x0 0xff>;
 		num-viewport = <16>;
-		max-link-speed = <3>;
+		max-link-speed = <2>;
 		dma-coherent;
 		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
 		msi-map = <0x0 &gic_its 0x0 0x10000>;
@@ -664,7 +664,7 @@
 		ti,syscon-pcie-mode = <&pcie0_mode>;
 		num-ib-windows = <16>;
 		num-ob-windows = <16>;
-		max-link-speed = <3>;
+		max-link-speed = <2>;
 		dma-coherent;
 		interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>;
 	};
@@ -682,7 +682,7 @@
 		ti,syscon-pcie-mode = <&pcie1_mode>;
 		bus-range = <0x0 0xff>;
 		num-viewport = <16>;
-		max-link-speed = <3>;
+		max-link-speed = <2>;
 		dma-coherent;
 		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
 		msi-map = <0x0 &gic_its 0x10000 0x10000>;
@@ -696,7 +696,7 @@
 		ti,syscon-pcie-mode = <&pcie1_mode>;
 		num-ib-windows = <16>;
 		num-ob-windows = <16>;
-		max-link-speed = <3>;
+		max-link-speed = <2>;
 		dma-coherent;
 		interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>;
 	};
-- 
2.17.1


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^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-02 16:53 [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed Sekhar Nori
@ 2020-08-27  4:43 ` Sekhar Nori
  2020-08-28  0:43   ` Nishanth Menon
       [not found]   ` <20200828002426.e7surnodpblgln7h@akan>
  2020-08-31 18:07 ` Nishanth Menon
  1 sibling, 2 replies; 8+ messages in thread
From: Sekhar Nori @ 2020-08-27  4:43 UTC (permalink / raw)
  To: Tero Kristo, Nishanth Menon
  Cc: Linux ARM Mailing List, Kishon Vijay Abraham I

Hi Nishanth,

On 02/08/20 10:23 PM, Sekhar Nori wrote:
> Per errata i2104 documented in AM65x device errata document (TI document
> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> both PCIe Root Complex and Endpoint modes of operation.
> 
> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> 
> Restrict speed to Gen2 to address the errata.
> 
> Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Is this in your queue or should I rebase and resend?

Thanks,
Sekhar

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-27  4:43 ` Sekhar Nori
@ 2020-08-28  0:43   ` Nishanth Menon
       [not found]   ` <20200828002426.e7surnodpblgln7h@akan>
  1 sibling, 0 replies; 8+ messages in thread
From: Nishanth Menon @ 2020-08-28  0:43 UTC (permalink / raw)
  To: Sekhar Nori; +Cc: Tero Kristo, Linux ARM Mailing List, Kishon Vijay Abraham I

On 10:13-20200827, Sekhar Nori wrote:
> Hi Nishanth,
> 
> On 02/08/20 10:23 PM, Sekhar Nori wrote:
> > Per errata i2104 documented in AM65x device errata document (TI document
> > number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> > both PCIe Root Complex and Endpoint modes of operation.
> > 
> > See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> > 
> > Restrict speed to Gen2 to address the errata.
> > 
> > Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> 
> Is this in your queue or should I rebase and resend?

Thanks for the reminder. I have put it on my staging branch for now.
Once rc3 gets tagged with irqchip related changes, I will move this
over to next.

Now, that said, Please consider converting
Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml
sometime in near future, if possible.

We might also want to spend a little more time with W=2 dtbs build and
dtbs_check to cleanup.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
       [not found]   ` <20200828002426.e7surnodpblgln7h@akan>
@ 2020-08-28  3:04     ` Sekhar Nori
  2020-08-28 11:32       ` Nishanth Menon
  0 siblings, 1 reply; 8+ messages in thread
From: Sekhar Nori @ 2020-08-28  3:04 UTC (permalink / raw)
  To: Nishanth Menon
  Cc: Tero Kristo, Linux ARM Mailing List, Kishon Vijay Abraham I

On 28/08/20 5:54 AM, Nishanth Menon wrote:
> On 10:13-20200827, Sekhar Nori wrote:
>> Hi Nishanth,
>>
>> On 02/08/20 10:23 PM, Sekhar Nori wrote:
>>> Per errata i2104 documented in AM65x device errata document (TI document
>>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
>>> both PCIe Root Complex and Endpoint modes of operation.
>>>
>>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
>>>
>>> Restrict speed to Gen2 to address the errata.
>>>
>>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>>
>> Is this in your queue or should I rebase and resend?
> 
> Thanks for the reminder. I have put it on my staging branch for now.
> Once rc3 gets tagged with irqchip related changes, I will move this over
> to next.

Hmm, this is errata fix and fair game for -rc cycle. Can we have this in
v5.9 itself?

> 
> Now, that said, Please consider converting
> Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml sometime
> in near future, if possible.
> 
> We might also want to spend a little more time with W=2 dtbs build and
> dtbs_check to cleanup.

Sure, will add to TODO.

Thanks,
Sekhar

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-28  3:04     ` Sekhar Nori
@ 2020-08-28 11:32       ` Nishanth Menon
  2020-08-28 11:56         ` Sekhar Nori
  0 siblings, 1 reply; 8+ messages in thread
From: Nishanth Menon @ 2020-08-28 11:32 UTC (permalink / raw)
  To: Sekhar Nori; +Cc: Tero Kristo, Linux ARM Mailing List, Kishon Vijay Abraham I

On 08:34-20200828, Sekhar Nori wrote:
> On 28/08/20 5:54 AM, Nishanth Menon wrote:
> > On 10:13-20200827, Sekhar Nori wrote:
> >> Hi Nishanth,
> >>
> >> On 02/08/20 10:23 PM, Sekhar Nori wrote:
> >>> Per errata i2104 documented in AM65x device errata document (TI document
> >>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> >>> both PCIe Root Complex and Endpoint modes of operation.
> >>>
> >>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> >>>
> >>> Restrict speed to Gen2 to address the errata.
> >>>
> >>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> >>
> >> Is this in your queue or should I rebase and resend?
> > 
> > Thanks for the reminder. I have put it on my staging branch for now.
> > Once rc3 gets tagged with irqchip related changes, I will move this over
> > to next.
> 
> Hmm, this is errata fix and fair game for -rc cycle. Can we have this in
> v5.9 itself?

We could, but does'nt seem urgent enough for 5.9 cycle since the dts node
was'nt introduced in this cycle, I think it was introduced around 5.3 or
so?

> 
> > 
> > Now, that said, Please consider converting
> > Documentation/devicetree/bindings/pci/pci-keystone.txt to yaml sometime
> > in near future, if possible.
> > 
> > We might also want to spend a little more time with W=2 dtbs build and
> > dtbs_check to cleanup.
> 
> Sure, will add to TODO.

Thanks.

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-28 11:32       ` Nishanth Menon
@ 2020-08-28 11:56         ` Sekhar Nori
  2020-08-28 13:08           ` Nishanth Menon
  0 siblings, 1 reply; 8+ messages in thread
From: Sekhar Nori @ 2020-08-28 11:56 UTC (permalink / raw)
  To: Nishanth Menon
  Cc: Tero Kristo, Linux ARM Mailing List, Kishon Vijay Abraham I

On 28/08/20 5:02 PM, Nishanth Menon wrote:
> On 08:34-20200828, Sekhar Nori wrote:
>> On 28/08/20 5:54 AM, Nishanth Menon wrote:
>>> On 10:13-20200827, Sekhar Nori wrote:
>>>> Hi Nishanth,
>>>>
>>>> On 02/08/20 10:23 PM, Sekhar Nori wrote:
>>>>> Per errata i2104 documented in AM65x device errata document (TI document
>>>>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
>>>>> both PCIe Root Complex and Endpoint modes of operation.
>>>>>
>>>>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
>>>>>
>>>>> Restrict speed to Gen2 to address the errata.
>>>>>
>>>>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
>>>>
>>>> Is this in your queue or should I rebase and resend?
>>>
>>> Thanks for the reminder. I have put it on my staging branch for now.
>>> Once rc3 gets tagged with irqchip related changes, I will move this over
>>> to next.
>>
>> Hmm, this is errata fix and fair game for -rc cycle. Can we have this in
>> v5.9 itself?
> 
> We could, but does'nt seem urgent enough for 5.9 cycle since the dts node
> was'nt introduced in this cycle, I think it was introduced around 5.3 or
> so?

Isn't this too early in -rc cycle to be regressions only?

I can provide a fixes tag if you want to ensure backporting. I felt odd
about it because its workaround for hardware issue, nothing wrong in the
original commit when it was written.

But if you are uncomfortable, fine :)

Thanks,
Sekhar

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-28 11:56         ` Sekhar Nori
@ 2020-08-28 13:08           ` Nishanth Menon
  0 siblings, 0 replies; 8+ messages in thread
From: Nishanth Menon @ 2020-08-28 13:08 UTC (permalink / raw)
  To: Sekhar Nori; +Cc: Tero Kristo, Linux ARM Mailing List, Kishon Vijay Abraham I

On 17:26-20200828, Sekhar Nori wrote:
> On 28/08/20 5:02 PM, Nishanth Menon wrote:
> > On 08:34-20200828, Sekhar Nori wrote:
> >> On 28/08/20 5:54 AM, Nishanth Menon wrote:
> >>> On 10:13-20200827, Sekhar Nori wrote:
> >>>> Hi Nishanth,
> >>>>
> >>>> On 02/08/20 10:23 PM, Sekhar Nori wrote:
> >>>>> Per errata i2104 documented in AM65x device errata document (TI document
> >>>>> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> >>>>> both PCIe Root Complex and Endpoint modes of operation.
> >>>>>
> >>>>> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> >>>>>
> >>>>> Restrict speed to Gen2 to address the errata.
> >>>>>
> >>>>> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> >>>>
> >>>> Is this in your queue or should I rebase and resend?
> >>>
> >>> Thanks for the reminder. I have put it on my staging branch for now.
> >>> Once rc3 gets tagged with irqchip related changes, I will move this over
> >>> to next.
> >>
> >> Hmm, this is errata fix and fair game for -rc cycle. Can we have this in
> >> v5.9 itself?
> > 
> > We could, but does'nt seem urgent enough for 5.9 cycle since the dts node
> > was'nt introduced in this cycle, I think it was introduced around 5.3 or
> > so?
> 
> Isn't this too early in -rc cycle to be regressions only?

are'nt we in rc3 already.. But anyways..
> 
> I can provide a fixes tag if you want to ensure backporting. I felt odd
> about it because its workaround for hardware issue, nothing wrong in the
> original commit when it was written.
> 
> But if you are uncomfortable, fine :)

Thanks. yeah, I'd rather do this for 5.10, too much mayhem in 5.9
cycle already. Need to quiet things a bit here.


-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

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^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
  2020-08-02 16:53 [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed Sekhar Nori
  2020-08-27  4:43 ` Sekhar Nori
@ 2020-08-31 18:07 ` Nishanth Menon
  1 sibling, 0 replies; 8+ messages in thread
From: Nishanth Menon @ 2020-08-31 18:07 UTC (permalink / raw)
  To: Tero Kristo, Sekhar Nori
  Cc: Nishanth Menon, Linux ARM Mailing List, Kishon Vijay Abraham I

On Sun, 2 Aug 2020 22:23:56 +0530, Sekhar Nori wrote:
> Per errata i2104 documented in AM65x device errata document (TI document
> number SPRZ452E, revised June 2019), Gen3 operation is not supported for
> both PCIe Root Complex and Endpoint modes of operation.
> 
> See: https://www.ti.com/lit/er/sprz452e/sprz452e.pdf
> 
> Restrict speed to Gen2 to address the errata.

Hi Sekhar Nori,

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed
      commit: 269a5641b1ed0ac00e9d75b43985407b34540d77

[1] git://git.kernel.org/pub/scm/linux/kernel/git/nmenon/linux.git
-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D


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^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2020-08-31 18:10 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-08-02 16:53 [PATCH] arm64: dts: ti: k3-am65: restrict PCIe to Gen2 speed Sekhar Nori
2020-08-27  4:43 ` Sekhar Nori
2020-08-28  0:43   ` Nishanth Menon
     [not found]   ` <20200828002426.e7surnodpblgln7h@akan>
2020-08-28  3:04     ` Sekhar Nori
2020-08-28 11:32       ` Nishanth Menon
2020-08-28 11:56         ` Sekhar Nori
2020-08-28 13:08           ` Nishanth Menon
2020-08-31 18:07 ` Nishanth Menon

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