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[68.147.8.254]) by smtp.gmail.com with ESMTPSA id u65sm505992pjb.22.2020.08.18.10.42.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 18 Aug 2020 10:42:13 -0700 (PDT) Date: Tue, 18 Aug 2020 11:42:11 -0600 From: Mathieu Poirier To: Mike Leach Subject: Re: [PATCH v8 21/24] coresight: cti: allow cti to be built as a module Message-ID: <20200818174211.GC3801581@xps15> References: <20200807111153.7784-1-tingwei@codeaurora.org> <20200807111153.7784-22-tingwei@codeaurora.org> <20200817171348.GE3614061@xps15> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200818_134216_644882_A208638F X-CRM114-Status: GOOD ( 39.12 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: tsoni@codeaurora.org, Sai Prakash Ranjan , Kim Phillips , Mao Jinlong , Suzuki K Poulose , Alexander Shishkin , Greg Kroah-Hartman , Coresight ML , Randy Dunlap , Mian Yousaf Kaukab , Russell King , Tingwei Zhang , Leo Yan , linux-arm-kernel Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 17, 2020 at 08:14:29PM +0100, Mike Leach wrote: > Hi, > > On Mon, 17 Aug 2020 at 18:13, Mathieu Poirier > wrote: > > > > On Fri, Aug 07, 2020 at 07:11:50PM +0800, Tingwei Zhang wrote: > > > Allow to build coresight-cti as a module, for ease of development. > > > > > > - Kconfig becomes a tristate, to allow =m > > > - append -core to source file name to allow module to > > > be called coresight-cti by the Makefile > > > - add an cti_remove function, for module unload > > > - move cti_remove_conn_xrefs to cti_remove > > > - add a MODULE_DEVICE_TABLE for autoloading on boot > > > > > > Signed-off-by: Tingwei Zhang > > > Tested-by: Mike Leach > > > > Mike, > > > > Please add a "Reviewed-by" tag once you have reviewed this patch. > > > > Sorry - not sure of the protocol - assumed that my tested-by implied > reviewed by. One does not imply the other - in fact many people keep to testing patches only. > > Anyway... > > Reviewed-by Mike Leach > > > > --- > > > drivers/hwtracing/coresight/Kconfig | 5 ++++- > > > drivers/hwtracing/coresight/Makefile | 4 ++-- > > > .../{coresight-cti.c => coresight-cti-core.c} | 19 ++++++++++++++++++- > > > .../hwtracing/coresight/coresight-platform.c | 1 + > > > drivers/hwtracing/coresight/coresight.c | 1 + > > > 5 files changed, 26 insertions(+), 4 deletions(-) > > > rename drivers/hwtracing/coresight/{coresight-cti.c => coresight-cti-core.c} (98%) > > > > > > diff --git a/drivers/hwtracing/coresight/Kconfig b/drivers/hwtracing/coresight/Kconfig > > > index f31778dd0b5d..b04aae2ceecc 100644 > > > --- a/drivers/hwtracing/coresight/Kconfig > > > +++ b/drivers/hwtracing/coresight/Kconfig > > > @@ -136,7 +136,7 @@ config CORESIGHT_CPU_DEBUG > > > module will be called coresight-cpu-debug. > > > > > > config CORESIGHT_CTI > > > - bool "CoreSight Cross Trigger Interface (CTI) driver" > > > + tristate "CoreSight Cross Trigger Interface (CTI) driver" > > > depends on ARM || ARM64 > > > help > > > This driver provides support for CoreSight CTI and CTM components. > > > @@ -147,6 +147,9 @@ config CORESIGHT_CTI > > > halt compared to disabling sources and sinks normally in driver > > > software. > > > > > > + To compile this driver as a module, choose M here: the > > > + module will be called coresight-cti. > > > + > > > config CORESIGHT_CTI_INTEGRATION_REGS > > > bool "Access CTI CoreSight Integration Registers" > > > depends on CORESIGHT_CTI > > > diff --git a/drivers/hwtracing/coresight/Makefile b/drivers/hwtracing/coresight/Makefile > > > index f2a568b969c4..0359d5a1588f 100644 > > > --- a/drivers/hwtracing/coresight/Makefile > > > +++ b/drivers/hwtracing/coresight/Makefile > > > @@ -19,6 +19,6 @@ coresight-etm4x-y := coresight-etm4x-core.o coresight-etm4x-sysfs.o > > > obj-$(CONFIG_CORESIGHT_STM) += coresight-stm.o > > > obj-$(CONFIG_CORESIGHT_CPU_DEBUG) += coresight-cpu-debug.o > > > obj-$(CONFIG_CORESIGHT_CATU) += coresight-catu.o > > > -obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o \ > > > - coresight-cti-platform.o \ > > > +obj-$(CONFIG_CORESIGHT_CTI) += coresight-cti.o > > > +coresight-cti-y := coresight-cti-core.o coresight-cti-platform.o \ > > > coresight-cti-sysfs.o > > > > Please align "coresight-cti-sysfs.o" with "coresight-cti-core.o". The same > > should be done for the etm3x driver. > > > > > diff --git a/drivers/hwtracing/coresight/coresight-cti.c b/drivers/hwtracing/coresight/coresight-cti-core.c > > > similarity index 98% > > > rename from drivers/hwtracing/coresight/coresight-cti.c > > > rename to drivers/hwtracing/coresight/coresight-cti-core.c > > > index 6bb06c5715db..ca31da6cf1c0 100644 > > > --- a/drivers/hwtracing/coresight/coresight-cti.c > > > +++ b/drivers/hwtracing/coresight/coresight-cti-core.c > > > @@ -838,7 +838,6 @@ static void cti_device_release(struct device *dev) > > > struct cti_drvdata *ect_item, *ect_tmp; > > > > > > mutex_lock(&ect_mutex); > > > - cti_remove_conn_xrefs(drvdata); > > > cti_pm_release(drvdata); > > > > > > /* remove from the list */ > > > @@ -853,6 +852,18 @@ static void cti_device_release(struct device *dev) > > > if (drvdata->csdev_release) > > > drvdata->csdev_release(dev); > > > } > > > +static int __exit cti_remove(struct amba_device *adev) > > > +{ > > > + struct cti_drvdata *drvdata = dev_get_drvdata(&adev->dev); > > > + > > > + mutex_lock(&ect_mutex); > > > + cti_remove_conn_xrefs(drvdata); > > > + mutex_unlock(&ect_mutex); > > > > The changelog point out this change but now _why_ it is done - please revise. > > > > By the time the system calls device_release, all the sysfs links have > gone so trying to remove them results in errors / crash. Not obvious > when the drivers were built in as this would be called while the > system was powering down, but very much noticeable when removing the > CTI moduie from a running system. > > Regards > > Mike > > > > + > > > + coresight_unregister(drvdata->csdev); > > > + > > > + return 0; > > > +} > > > > > > static int cti_probe(struct amba_device *adev, const struct amba_id *id) > > > { > > > @@ -972,6 +983,7 @@ static const struct amba_id cti_ids[] = { > > > CS_AMBA_UCI_ID(0x000bb9ed, uci_id_cti), /* Coresight CTI (SoC 600) */ > > > { 0, 0}, > > > }; > > > +MODULE_DEVICE_TABLE(amba, cti_ids); > > > > > > static struct amba_driver cti_driver = { > > > .drv = { > > > @@ -980,6 +992,7 @@ static struct amba_driver cti_driver = { > > > .suppress_bind_attrs = true, > > > }, > > > .probe = cti_probe, > > > + .remove = cti_remove, > > > .id_table = cti_ids, > > > }; > > > > > > @@ -1002,3 +1015,7 @@ static void __exit cti_exit(void) > > > > > > module_init(cti_init); > > > module_exit(cti_exit); > > > + > > > +MODULE_AUTHOR("Mike Leach "); > > > +MODULE_DESCRIPTION("Arm CoreSight CTI Driver"); > > > +MODULE_LICENSE("GPL v2"); > > > diff --git a/drivers/hwtracing/coresight/coresight-platform.c b/drivers/hwtracing/coresight/coresight-platform.c > > > index bfd44231d7ad..635d55c1d580 100644 > > > --- a/drivers/hwtracing/coresight/coresight-platform.c > > > +++ b/drivers/hwtracing/coresight/coresight-platform.c > > > @@ -75,6 +75,7 @@ coresight_find_csdev_by_fwnode(struct fwnode_handle *r_fwnode) > > > } > > > return csdev; > > > } > > > +EXPORT_SYMBOL_GPL(coresight_find_csdev_by_fwnode); > > > > > > #ifdef CONFIG_OF > > > static inline bool of_coresight_legacy_ep_is_input(struct device_node *ep) > > > diff --git a/drivers/hwtracing/coresight/coresight.c b/drivers/hwtracing/coresight/coresight.c > > > index 8dcd73ea33b4..f9566d667261 100644 > > > --- a/drivers/hwtracing/coresight/coresight.c > > > +++ b/drivers/hwtracing/coresight/coresight.c > > > @@ -289,6 +289,7 @@ void coresight_set_assoc_ectdev_mutex(struct coresight_device *csdev, > > > csdev->ect_dev = ect_csdev; > > > mutex_unlock(&coresight_mutex); > > > } > > > +EXPORT_SYMBOL_GPL(coresight_set_assoc_ectdev_mutex); > > > > > > static int coresight_enable_sink(struct coresight_device *csdev, > > > u32 mode, void *data) > > > -- > > > The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, > > > a Linux Foundation Collaborative Project > > > > > > > -- > Mike Leach > Principal Engineer, ARM Ltd. > Manchester Design Centre. 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