From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8D16C433E6 for ; Fri, 28 Aug 2020 09:58:15 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 78673208D5 for ; Fri, 28 Aug 2020 09:58:15 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="yy1so+9g" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 78673208D5 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=5mb+gSh2rN7kLn1iYb65l0K5S7j9mp+7mIjkbU5vab4=; b=yy1so+9gcMRGZzqMmicA/D2yH ES1ZdQrembiIWBoJb1dxvFar64p/b59rxNwdfn5UjSuWSoKA+MzeOoeSPoe0y+MBO01KGcvtgRUjX wtdluAY7pD9eQpW/1Vc6bzfzIXnS0ww2wGBnxrh1kvmE5Ph8N7zHw3t6QStYwfGV6N/lf21zGwGzv CrF6A4YZYJFcc4OmeJc1lc7Z2zYkk5wK7jEpdjEhebWgMXlL3zofuGZ/gpzp8o67lmBSA1pDkhTbk TFGIdnsEiFiMPWqllT+dKe9Za2YZSwneArHv3FWqDQ1Lr/LhIPKHf1o4AAXpjg35NsdVCpB4DR0AH vaU1ugjjw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kBb7r-0001mP-Ig; Fri, 28 Aug 2020 09:56:51 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kBb7o-0001lg-GM for linux-arm-kernel@lists.infradead.org; Fri, 28 Aug 2020 09:56:49 +0000 Received: from gaia (unknown [46.69.195.127]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3CAEB208D5; Fri, 28 Aug 2020 09:56:44 +0000 (UTC) Date: Fri, 28 Aug 2020 10:56:41 +0100 From: Catalin Marinas To: Evgenii Stepanov Subject: Re: [PATCH 21/35] arm64: mte: Add in-kernel tag fault handler Message-ID: <20200828095641.GD3169@gaia> References: <20200827095429.GC29264@gaia> <20200827131045.GM29264@gaia> <20200827145642.GO29264@gaia> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200828_055648_693225_2D9FB8CD X-CRM114-Status: GOOD ( 28.45 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marco Elver , Elena Petrova , Andrey Konovalov , Kevin Brodsky , Will Deacon , Branislav Rankov , kasan-dev , LKML , Linux Memory Management List , Alexander Potapenko , Linux ARM , Andrey Ryabinin , Andrew Morton , Vincenzo Frascino , Dmitry Vyukov Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Aug 27, 2020 at 12:14:26PM -0700, Evgenii Stepanov wrote: > On Thu, Aug 27, 2020 at 7:56 AM Catalin Marinas wrote: > > On Thu, Aug 27, 2020 at 03:34:42PM +0200, Andrey Konovalov wrote: > > > On Thu, Aug 27, 2020 at 3:10 PM Catalin Marinas wrote: > > > > On Thu, Aug 27, 2020 at 02:31:23PM +0200, Andrey Konovalov wrote: > > > > > On Thu, Aug 27, 2020 at 11:54 AM Catalin Marinas > > > > > wrote: > > > > > > On Fri, Aug 14, 2020 at 07:27:03PM +0200, Andrey Konovalov wrote: > > > > > > > +static int do_tag_recovery(unsigned long addr, unsigned int esr, > > > > > > > + struct pt_regs *regs) > > > > > > > +{ > > > > > > > + report_tag_fault(addr, esr, regs); > > > > > > > + > > > > > > > + /* Skip over the faulting instruction and continue: */ > > > > > > > + arm64_skip_faulting_instruction(regs, AARCH64_INSN_SIZE); > > > > > > > > > > > > Ooooh, do we expect the kernel to still behave correctly after this? I > > > > > > thought the recovery means disabling tag checking altogether and > > > > > > restarting the instruction rather than skipping over it. > > [...] > > > > > Can we disable MTE, reexecute the instruction, and then reenable MTE, > > > > > or something like that? > > > > > > > > If you want to preserve the MTE enabled, you could single-step the > > > > instruction or execute it out of line, though it's a bit more convoluted > > > > (we have a similar mechanism for kprobes/uprobes). > > > > > > > > Another option would be to attempt to set the matching tag in memory, > > > > under the assumption that it is writable (if it's not, maybe it's fine > > > > to panic). Not sure how this interacts with the slub allocator since, > > > > presumably, the logical tag in the pointer is wrong rather than the > > > > allocation one. > > > > > > > > Yet another option would be to change the tag in the register and > > > > re-execute but this may confuse the compiler. > > > > > > Which one of these would be simpler to implement? > > > > Either 2 or 3 would be simpler (re-tag the memory location or the > > pointer) with the caveats I mentioned. Also, does the slab allocator > > need to touch the memory on free with a tagged pointer? Otherwise slab > > may hit an MTE fault itself. > > Changing the memory tag can cause faults in other threads, and that > could be very confusing. It could indeed trigger a chain of faults. It's not even other threads, it could be the same thread in a different function. > Probably the safest thing is to retag the register, single step and > then retag it back, but be careful with the instructions that change > the address register (like ldr x0, [x0]). This gets complicated if you have to parse the opcode. If you can single-step, just set PSTATE.TCO for the instruction. But the single-step machinery gets more complicated, probably interacts badly with kprobes. I think the best option is to disable the MTE checks in TCF on an _unhandled_ kernel fault, report and continue. For the KASAN tests, add accessors similar to get_user/put_user which are able to handle the fault and return an error. Such accessors, since they have a fixup handler, would not lead to the MTE checks being disabled. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel