From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-11.2 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4D2E8C433E2 for ; Fri, 11 Sep 2020 15:26:40 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D474620770 for ; Fri, 11 Sep 2020 15:26:39 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="KZt2V7C4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D474620770 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=y43tZyuNutrCBx4AtkuUulzjbJis1I24P9iFM5eCBLU=; b=KZt2V7C4Ciis0fsL2fMpvM5PY GrLKH0NRiDQEQMTvTkrGV4nJH8piU6EyaAV8dXZpvEFM/qyj+nLbCxvyEurlArPavA7BYQAgsBi2F /jbG10ogMtofI4eBSsbFAsQA2r0houl/FHA67GI31VKzni65DZEXntdWfKhbq6qpitZ7WIZQGCeRh KDOJk3vp+jyQtEJ2OBTRDyCsV6xrfzQ2uSTd68l8i63JDXh4hyg0a0J9/bz9LKMSTmymRFAEH4GhP GEA8ZfuYCPtqU+XBj5pymixewGUelxFF1TRBgYhG2ItQsAYCuhhWV2iQwg6Tu7/mBiDjM89yhqKje 7loPMwStg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGkv9-0003gJ-QV; Fri, 11 Sep 2020 15:25:03 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kGkv6-0003fb-Q5 for linux-arm-kernel@lists.infradead.org; Fri, 11 Sep 2020 15:25:01 +0000 Received: from gaia (unknown [46.69.195.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id BCB282076C; Fri, 11 Sep 2020 15:24:58 +0000 (UTC) Date: Fri, 11 Sep 2020 16:24:56 +0100 From: Catalin Marinas To: Anshuman Khandual Subject: Re: [PATCH V4] arm64/cpuinfo: Define HWCAP name arrays per their actual bit definitions Message-ID: <20200911152455.GG12835@gaia> References: <1599630535-29337-1-git-send-email-anshuman.khandual@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1599630535-29337-1-git-send-email-anshuman.khandual@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200911_112500_974968_594F3B91 X-CRM114-Status: GOOD ( 27.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Suzuki K Poulose , linux-kernel@vger.kernel.org, Ard Biesheuvel , Mark Brown , will@kernel.org, Dave Martin , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Sep 09, 2020 at 11:18:55AM +0530, Anshuman Khandual wrote: > HWCAP name arrays (hwcap_str, compat_hwcap_str, compat_hwcap2_str) that are > scanned for /proc/cpuinfo are detached from their bit definitions making it > vulnerable and difficult to correlate. It is also bit problematic because > during /proc/cpuinfo dump these arrays get traversed sequentially assuming > they reflect and match actual HWCAP bit sequence, to test various features > for a given CPU. This redefines name arrays per their HWCAP bit definitions > . It also warns after detecting any feature which is not expected on arm64. > > Cc: Catalin Marinas > Cc: Will Deacon > Cc: Mark Brown > Cc: Dave Martin > Cc: Ard Biesheuvel > Cc: Mark Rutland > Cc: Suzuki K Poulose > Cc: linux-arm-kernel@lists.infradead.org > Cc: linux-kernel@vger.kernel.org > Signed-off-by: Anshuman Khandual > --- > This applies on 5.9-rc4 > > Mark, since the patch has changed I have dropped your Acked-by: tag. Are you > happy to give a new one ? > > Changes in V4: > > - Unified all three HWCAP array traversal per Will > > Changes in V3: (https://patchwork.kernel.org/patch/11718113/) > > - Moved name arrays to (arch/arm64/kernel/cpuinfo.c) to prevent a build warning > - Replaced string values with NULL for all compat features not possible on arm64 > - Changed compat_hwcap_str[] iteration on size as some NULL values are expected > - Warn once after detecting any feature on arm64 that is not expected > > Changes in V2: (https://patchwork.kernel.org/patch/11533755/) > > - Defined COMPAT_KERNEL_HWCAP[2] and updated the name arrays per Mark > - Updated the commit message as required > > Changes in V1: (https://patchwork.kernel.org/patch/11532945/) > > arch/arm64/include/asm/hwcap.h | 9 ++ > arch/arm64/kernel/cpuinfo.c | 176 +++++++++++++++++---------------- > 2 files changed, 101 insertions(+), 84 deletions(-) > > diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h > index 22f73fe09030..6493a4c63a2f 100644 > --- a/arch/arm64/include/asm/hwcap.h > +++ b/arch/arm64/include/asm/hwcap.h > @@ -8,18 +8,27 @@ > #include > #include > > +#define COMPAT_HWCAP_SWP (1 << 0) > #define COMPAT_HWCAP_HALF (1 << 1) > #define COMPAT_HWCAP_THUMB (1 << 2) > +#define COMPAT_HWCAP_26BIT (1 << 3) > #define COMPAT_HWCAP_FAST_MULT (1 << 4) > +#define COMPAT_HWCAP_FPA (1 << 5) > #define COMPAT_HWCAP_VFP (1 << 6) > #define COMPAT_HWCAP_EDSP (1 << 7) > +#define COMPAT_HWCAP_JAVA (1 << 8) > +#define COMPAT_HWCAP_IWMMXT (1 << 9) > +#define COMPAT_HWCAP_CRUNCH (1 << 10) > +#define COMPAT_HWCAP_THUMBEE (1 << 11) > #define COMPAT_HWCAP_NEON (1 << 12) > #define COMPAT_HWCAP_VFPv3 (1 << 13) > +#define COMPAT_HWCAP_VFPV3D16 (1 << 14) > #define COMPAT_HWCAP_TLS (1 << 15) > #define COMPAT_HWCAP_VFPv4 (1 << 16) > #define COMPAT_HWCAP_IDIVA (1 << 17) > #define COMPAT_HWCAP_IDIVT (1 << 18) > #define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT) > +#define COMPAT_HWCAP_VFPD32 (1 << 19) > #define COMPAT_HWCAP_LPAE (1 << 20) > #define COMPAT_HWCAP_EVTSTRM (1 << 21) > > diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c > index d0076c2159e6..04640f5f9f0f 100644 > --- a/arch/arm64/kernel/cpuinfo.c > +++ b/arch/arm64/kernel/cpuinfo.c > @@ -43,94 +43,93 @@ static const char *icache_policy_str[] = { > unsigned long __icache_flags; > > static const char *const hwcap_str[] = { > - "fp", > - "asimd", > - "evtstrm", > - "aes", > - "pmull", > - "sha1", > - "sha2", > - "crc32", > - "atomics", > - "fphp", > - "asimdhp", > - "cpuid", > - "asimdrdm", > - "jscvt", > - "fcma", > - "lrcpc", > - "dcpop", > - "sha3", > - "sm3", > - "sm4", > - "asimddp", > - "sha512", > - "sve", > - "asimdfhm", > - "dit", > - "uscat", > - "ilrcpc", > - "flagm", > - "ssbs", > - "sb", > - "paca", > - "pacg", > - "dcpodp", > - "sve2", > - "sveaes", > - "svepmull", > - "svebitperm", > - "svesha3", > - "svesm4", > - "flagm2", > - "frint", > - "svei8mm", > - "svef32mm", > - "svef64mm", > - "svebf16", > - "i8mm", > - "bf16", > - "dgh", > - "rng", > - "bti", > + [KERNEL_HWCAP_FP] = "fp", > + [KERNEL_HWCAP_ASIMD] = "asimd", > + [KERNEL_HWCAP_EVTSTRM] = "evtstrm", > + [KERNEL_HWCAP_AES] = "aes", > + [KERNEL_HWCAP_PMULL] = "pmull", > + [KERNEL_HWCAP_SHA1] = "sha1", > + [KERNEL_HWCAP_SHA2] = "sha2", > + [KERNEL_HWCAP_CRC32] = "crc32", > + [KERNEL_HWCAP_ATOMICS] = "atomics", > + [KERNEL_HWCAP_FPHP] = "fphp", > + [KERNEL_HWCAP_ASIMDHP] = "asimdhp", > + [KERNEL_HWCAP_CPUID] = "cpuid", > + [KERNEL_HWCAP_ASIMDRDM] = "asimdrdm", > + [KERNEL_HWCAP_JSCVT] = "jscvt", > + [KERNEL_HWCAP_FCMA] = "fcma", > + [KERNEL_HWCAP_LRCPC] = "lrcpc", > + [KERNEL_HWCAP_DCPOP] = "dcpop", > + [KERNEL_HWCAP_SHA3] = "sha3", > + [KERNEL_HWCAP_SM3] = "sm3", > + [KERNEL_HWCAP_SM4] = "sm4", > + [KERNEL_HWCAP_ASIMDDP] = "asimddp", > + [KERNEL_HWCAP_SHA512] = "sha512", > + [KERNEL_HWCAP_SVE] = "sve", > + [KERNEL_HWCAP_ASIMDFHM] = "asimdfhm", > + [KERNEL_HWCAP_DIT] = "dit", > + [KERNEL_HWCAP_USCAT] = "uscat", > + [KERNEL_HWCAP_ILRCPC] = "ilrcpc", > + [KERNEL_HWCAP_FLAGM] = "flagm", > + [KERNEL_HWCAP_SSBS] = "ssbs", > + [KERNEL_HWCAP_SB] = "sb", > + [KERNEL_HWCAP_PACA] = "paca", > + [KERNEL_HWCAP_PACG] = "pacg", > + [KERNEL_HWCAP_DCPODP] = "dcpodp", > + [KERNEL_HWCAP_SVE2] = "sve2", > + [KERNEL_HWCAP_SVEAES] = "sveaes", > + [KERNEL_HWCAP_SVEPMULL] = "svepmull", > + [KERNEL_HWCAP_SVEBITPERM] = "svebitperm", > + [KERNEL_HWCAP_SVESHA3] = "svesha3", > + [KERNEL_HWCAP_SVESM4] = "svesm4", > + [KERNEL_HWCAP_FLAGM2] = "flagm2", > + [KERNEL_HWCAP_FRINT] = "frint", > + [KERNEL_HWCAP_SVEI8MM] = "svei8mm", > + [KERNEL_HWCAP_SVEF32MM] = "svef32mm", > + [KERNEL_HWCAP_SVEF64MM] = "svef64mm", > + [KERNEL_HWCAP_SVEBF16] = "svebf16", > + [KERNEL_HWCAP_I8MM] = "i8mm", > + [KERNEL_HWCAP_BF16] = "bf16", > + [KERNEL_HWCAP_DGH] = "dgh", > + [KERNEL_HWCAP_RNG] = "rng", > + [KERNEL_HWCAP_BTI] = "bti", > /* reserved for "mte" */ > - NULL > }; With this initialisation, we no longer need the "reserved for mte" string. Otherwise, feel free to add: Acked-by: Catalin Marinas _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel