From: Eugen Hristev <eugen.hristev@microchip.com>
To: <vkoul@kernel.org>, <robh+dt@kernel.org>,
<tudor.ambarus@microchip.com>, <ludovic.desroches@microchip.com>
Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
dmaengine@vger.kernel.org,
Eugen Hristev <eugen.hristev@microchip.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 4/7] dmaengine: at_xdmac: adapt perid for mem2mem operations
Date: Mon, 14 Sep 2020 17:09:53 +0300 [thread overview]
Message-ID: <20200914140956.221432-5-eugen.hristev@microchip.com> (raw)
In-Reply-To: <20200914140956.221432-1-eugen.hristev@microchip.com>
The PERID in the CC register for mem2mem operations must match an unused
PERID.
The PERID field is 7 bits, but the selected value is 0x3f.
On later products we can have more reserved PERIDs for actual peripherals,
thus this needs to be increased to maximum size.
Changing the value to 0x7f, which is the maximum for 7 bits field.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
---
drivers/dma/at_xdmac.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index fab19e00a7be..81bb90206092 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -726,7 +726,7 @@ at_xdmac_interleaved_queue_desc(struct dma_chan *chan,
* match the one of another channel. If not, it could lead to spurious
* flag status.
*/
- u32 chan_cc = AT_XDMAC_CC_PERID(0x3f)
+ u32 chan_cc = AT_XDMAC_CC_PERID(0x7f)
| AT_XDMAC_CC_DIF(0)
| AT_XDMAC_CC_SIF(0)
| AT_XDMAC_CC_MBSIZE_SIXTEEN
@@ -908,7 +908,7 @@ at_xdmac_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
* match the one of another channel. If not, it could lead to spurious
* flag status.
*/
- u32 chan_cc = AT_XDMAC_CC_PERID(0x3f)
+ u32 chan_cc = AT_XDMAC_CC_PERID(0x7f)
| AT_XDMAC_CC_DAM_INCREMENTED_AM
| AT_XDMAC_CC_SAM_INCREMENTED_AM
| AT_XDMAC_CC_DIF(0)
@@ -1014,7 +1014,7 @@ static struct at_xdmac_desc *at_xdmac_memset_create_desc(struct dma_chan *chan,
* match the one of another channel. If not, it could lead to spurious
* flag status.
*/
- u32 chan_cc = AT_XDMAC_CC_PERID(0x3f)
+ u32 chan_cc = AT_XDMAC_CC_PERID(0x7f)
| AT_XDMAC_CC_DAM_UBS_AM
| AT_XDMAC_CC_SAM_INCREMENTED_AM
| AT_XDMAC_CC_DIF(0)
--
2.25.1
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next prev parent reply other threads:[~2020-09-14 14:12 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-14 14:09 [PATCH 0/7] dmaengine: add support for sama7g5 based at_xdmac Eugen Hristev
2020-09-14 14:09 ` [PATCH 1/7] dmaengine: at_xdmac: separate register defines into header file Eugen Hristev
2020-09-23 5:07 ` Tudor.Ambarus
2020-09-14 14:09 ` [PATCH 2/7] MAINTAINERS: add dma/at_xdmac_regs.h to XDMAC driver entry Eugen Hristev
2020-09-23 5:12 ` Tudor.Ambarus
2020-09-14 14:09 ` [PATCH 3/7] dt-bindings: dmaengine: at_xdmac: add compatible with microchip, sama7g5 Eugen Hristev
2020-09-22 23:32 ` [PATCH 3/7] dt-bindings: dmaengine: at_xdmac: add compatible with microchip,sama7g5 Rob Herring
2020-09-14 14:09 ` Eugen Hristev [this message]
2020-09-23 5:30 ` [PATCH 4/7] dmaengine: at_xdmac: adapt perid for mem2mem operations Tudor.Ambarus
2020-09-23 5:35 ` Tudor.Ambarus
2020-09-14 14:09 ` [PATCH 5/7] dmaengine: at_xdmac: add support for sama7g5 based at_xdmac Eugen Hristev
2020-09-23 7:08 ` Tudor.Ambarus
2020-10-16 6:52 ` Eugen.Hristev
2020-09-14 14:09 ` [PATCH 6/7] dt-bindings: dmaengine: at_xdmac: add optional microchip, m2m property Eugen Hristev
2020-09-22 23:33 ` [PATCH 6/7] dt-bindings: dmaengine: at_xdmac: add optional microchip,m2m property Rob Herring
2020-10-16 6:45 ` Eugen.Hristev
2020-10-16 7:06 ` Vinod Koul
2020-10-16 7:09 ` Eugen.Hristev
2020-09-14 14:09 ` [PATCH 7/7] dmaengine: at_xdmac: add AXI priority support and recommended settings Eugen Hristev
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