From: Roger Quadros <rogerq@ti.com>
To: <peda@axentia.se>, <nm@ti.com>
Cc: devicetree@vger.kernel.org, nsekhar@ti.com,
linux-kernel@vger.kernel.org, kishon@ti.com, t-kristo@ti.com,
robh+dt@kernel.org, linux-arm-kernel@lists.infradead.org,
Roger Quadros <rogerq@ti.com>
Subject: [PATCH v4 1/6] dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
Date: Mon, 21 Sep 2020 17:39:36 +0300 [thread overview]
Message-ID: <20200921143941.13905-2-rogerq@ti.com> (raw)
In-Reply-To: <20200921143941.13905-1-rogerq@ti.com>
There are 4 lanes in each J7200 SERDES. Each SERDES lane mux can
select upto 4 different IPs. Define all the possible functions.
Cc: Peter Rosin <peda@axentia.se>
Signed-off-by: Roger Quadros <rogerq@ti.com>
---
include/dt-bindings/mux/ti-serdes.h | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/include/dt-bindings/mux/ti-serdes.h b/include/dt-bindings/mux/ti-serdes.h
index 146d0685a925..9047ec6bd3cf 100644
--- a/include/dt-bindings/mux/ti-serdes.h
+++ b/include/dt-bindings/mux/ti-serdes.h
@@ -68,4 +68,26 @@
#define J721E_SERDES4_LANE3_QSGMII_LANE8 0x2
#define J721E_SERDES4_LANE3_IP4_UNUSED 0x3
+/* J7200 */
+
+#define J7200_SERDES0_LANE0_QSGMII_LANE3 0x0
+#define J7200_SERDES0_LANE0_PCIE1_LANE0 0x1
+#define J7200_SERDES0_LANE0_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE0_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE1_QSGMII_LANE4 0x0
+#define J7200_SERDES0_LANE1_PCIE1_LANE1 0x1
+#define J7200_SERDES0_LANE1_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE1_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE2_QSGMII_LANE1 0x0
+#define J7200_SERDES0_LANE2_PCIE1_LANE2 0x1
+#define J7200_SERDES0_LANE2_IP3_UNUSED 0x2
+#define J7200_SERDES0_LANE2_IP4_UNUSED 0x3
+
+#define J7200_SERDES0_LANE3_QSGMII_LANE2 0x0
+#define J7200_SERDES0_LANE3_PCIE1_LANE3 0x1
+#define J7200_SERDES0_LANE3_USB 0x2
+#define J7200_SERDES0_LANE3_IP4_UNUSED 0x3
+
#endif /* _DT_BINDINGS_MUX_TI_SERDES */
--
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next prev parent reply other threads:[~2020-09-21 14:42 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-21 14:39 [PATCH v4 0/6] arm64: dts: ti: Add USB support for J7200 EVM Roger Quadros
2020-09-21 14:39 ` Roger Quadros [this message]
2020-09-24 11:14 ` [PATCH v4 1/6] dt-bindings: ti-serdes-mux: Add defines for J7200 SoC Nishanth Menon
2020-09-28 18:31 ` Rob Herring
2020-09-29 6:24 ` Peter Rosin
2020-09-21 14:39 ` [PATCH v4 2/6] arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux Roger Quadros
2020-09-21 14:39 ` [PATCH v4 3/6] arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX Roger Quadros
2020-09-21 14:39 ` [PATCH v4 4/6] arm64: dts: ti: k3-j7200-main: Add USB controller Roger Quadros
2020-09-21 14:39 ` [PATCH v4 5/6] arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function Roger Quadros
2020-09-21 14:39 ` [PATCH v4 6/6] arm64: dts: ti: k3-j7200-common-proc-board: Add USB support Roger Quadros
2020-09-24 11:04 ` [PATCH v4 0/6] arm64: dts: ti: Add USB support for J7200 EVM Vignesh Raghavendra
2020-09-30 12:09 ` Nishanth Menon
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