From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.7 required=3.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED,DKIM_SIGNED,DKIM_VALID,FREEMAIL_FORGED_FROMDOMAIN, FREEMAIL_FROM,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 45219C2D0A8 for ; Sat, 26 Sep 2020 13:01:57 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id F2ED0221ED for ; Sat, 26 Sep 2020 13:01:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="y3WN3qHr"; dkim=fail reason="signature verification failed" (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="bh7kQkJw" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org F2ED0221ED Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:Message-Id:Date: Subject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=risagCO+7whVdSxdTqOQ/WR2YxhiA3+jjw9KIq2aaq4=; b=y3WN3qHrViGl45NpbLko+dAwR t5rOOCueVgqOwWEgv9jr0+EOV3jAwucAkDmVSBOELwgOoqBBLBkEHjMQwRkravCCADMM/b/YJMCSQ /3I/TSIc80oSFakRlpyH9Q9ISaBHj7IIvDDL1pR7HWu1ytbgCo7CJmvUujXKIOvvd870HDCxQ+TBb IR812zjZci5e6CSkiSK14YDVgXmbTO/Vb93sY1EOGzekaKqNVvEA1t9RbhYsWdGWjjdJfGFZuE+hb 09aDHZtjpgwWEEx8dxKijF57S2XoaKeWBMn1X3zZDGNAuQVjC9mux9tMavTq/NphzKKnuVhUK4qiO nZtMT8Ebg==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kM9oJ-0008PH-QZ; Sat, 26 Sep 2020 13:00:19 +0000 Received: from mail-wr1-x441.google.com ([2a00:1450:4864:20::441]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kM9oD-0008LG-5b for linux-arm-kernel@lists.infradead.org; Sat, 26 Sep 2020 13:00:15 +0000 Received: by mail-wr1-x441.google.com with SMTP id g4so6867419wrs.5 for ; Sat, 26 Sep 2020 06:00:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bY8xzUZwfiRgG++8UhbUZ4PhMonRbvfxxs1/C1VhNr8=; b=bh7kQkJwX2m931m/aoB/kEq4oBF/pUu4FaDCgI1FK44ZubMuxK8CfmGFL2NtcUaa4g 4jorXQKRCP3vcizvjaFTUCq8GEvfZdiPQ1qqEGcewDwl3NB+DTBN6fJm3jiZq0zSc0p5 +mhGTmRvvtT6T9Fua4KpcGCTS+8y69RKs2/9cCsAMivHwFHUl+4RPoBTzeeP68vav2BQ e6Nd+2DO9dnIiksFJ7+S7UJEJuuduiic1yT3YG0ItIyrNzBVbuaJUeSdyCXEoZmflDhM k5p8XCyrT9ajdJOyXOlSzThp4PVmk9NWuO3zkYKnNAWymwRa5CapmPc54KF0dVFikUja BFBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bY8xzUZwfiRgG++8UhbUZ4PhMonRbvfxxs1/C1VhNr8=; b=TehHGqCkBBF8u7cCiz2IDCcHtpulauq0zyF6GV4J+FRF/HmHfesfWGRUMyIPllFVcK v7VtRy2ETDLKEl0wtRc0loOD3Wz/nIogLaV5+1pup/tDCysX6VhyolodhhqiSgIflamP x+WOdmNYkchrDy7CJIP+MnaGzi25rfxbgDhT1SK99MZk967PMzB9ViCi/8tpWlbWQv6+ jMrMSA9ELpsodUnddZciDtbdB3qsqJGxvlezYqThdXTw3GxU8woDUdb/FovBPCouFE+g dNmk3+xWlNvadejPDhBxuHVgaAHv2gdVWD0suyK/aKJteaX36nEjxzrk1K/jc0YPYyrT J5GA== X-Gm-Message-State: AOAM5307lPHm5NOi22oh3LeRdjaUAQbpZlAD0B6f1zIu6COUK/rI0txU J1hRSpBlAw+qVezaKCXOYoY= X-Google-Smtp-Source: ABdhPJyVK04EKr7pFq0l3qQczUszF+ln+iNUYNkyLlGdTas05FXQL/BmnqnjiRQDIhHluJ1TDk4wnA== X-Received: by 2002:adf:b306:: with SMTP id j6mr9052769wrd.279.1601125210585; Sat, 26 Sep 2020 06:00:10 -0700 (PDT) Received: from IcarusMOD.eternityproject.eu ([2.237.20.237]) by smtp.gmail.com with ESMTPSA id b11sm6462896wrt.38.2020.09.26.06.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 26 Sep 2020 06:00:10 -0700 (PDT) From: kholk11@gmail.com To: will@kernel.org Subject: [PATCH 2/8] iommu/arm-smmu-qcom: Add QC SMMUv2 VA Size quirk for SDM660 Date: Sat, 26 Sep 2020 14:59:58 +0200 Message-Id: <20200926130004.13528-3-kholk11@gmail.com> X-Mailer: git-send-email 2.28.0 In-Reply-To: <20200926130004.13528-1-kholk11@gmail.com> References: <20200926130004.13528-1-kholk11@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200926_090013_261611_AAE95521 X-CRM114-Status: GOOD ( 18.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, marijns95@gmail.com, phone-devel@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, joro@8bytes.org, konradybcio@gmail.com, bjorn.andersson@linaro.org, martin.botka1@gmail.com, kholk11@gmail.com, robin.murphy@arm.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: AngeloGioacchino Del Regno Some IOMMUs are getting set-up for Shared Virtual Address, but: 1. They are secured by the Hypervisor, so any configuration change will generate a hyp-fault and crash the system 2. This 39-bits Virtual Address size deviates from the ARM System MMU Architecture specification for SMMUv2, hence it is non-standard. In this case, the only way to keep the IOMMU as the firmware did configure it, is to hardcode a maximum VA size of 39 bits (because of point 1). This gives the need to add implementation details bits for at least some of the SoCs having this kind of configuration, which are at least SDM630, SDM636 and SDM660. These implementation details will be enabled on finding the qcom,sdm660-smmu-v2 compatible. Signed-off-by: AngeloGioacchino Del Regno --- drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3 ++- drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 31 +++++++++++++++++++++- 2 files changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c index f4ff124a1967..9d753f8af2cc 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-impl.c @@ -216,7 +216,8 @@ struct arm_smmu_device *arm_smmu_impl_init(struct arm_smmu_device *smmu) if (of_device_is_compatible(np, "nvidia,tegra194-smmu")) return nvidia_smmu_impl_init(smmu); - if (of_device_is_compatible(np, "qcom,sdm845-smmu-500") || + if (of_device_is_compatible(np, "qcom,sdm660-smmu-v2") || + of_device_is_compatible(np, "qcom,sdm845-smmu-500") || of_device_is_compatible(np, "qcom,sc7180-smmu-500") || of_device_is_compatible(np, "qcom,sm8150-smmu-500") || of_device_is_compatible(np, "qcom,sm8250-smmu-500")) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c index 7859fd0db22a..f5bbfe86ef30 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c @@ -65,8 +65,33 @@ static const struct arm_smmu_impl qcom_smmu500_impl = { .reset = qcom_smmu500_reset, }; +static int qcom_smmuv2_cfg_probe(struct arm_smmu_device *smmu) +{ + /* + * Some IOMMUs are getting set-up for Shared Virtual Address, but: + * 1. They are secured by the Hypervisor, so any configuration + * change will generate a hyp-fault and crash the system + * 2. This 39-bits Virtual Address size deviates from the ARM + * System MMU Architecture specification for SMMUv2, hence + * it is non-standard. In this case, the only way to keep the + * IOMMU as the firmware did configure it, is to hardcode a + * maximum VA size of 39 bits (because of point 1). + */ + if (smmu->va_size > 39UL) + dev_notice(smmu->dev, + "\tenabling workaround for QCOM SMMUv2 VA size\n"); + smmu->va_size = min(smmu->va_size, 39UL); + + return 0; +} + +static const struct arm_smmu_impl qcom_smmuv2_impl = { + .cfg_probe = qcom_smmuv2_cfg_probe, +}; + struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) { + const struct device_node *np = smmu->dev->of_node; struct qcom_smmu *qsmmu; qsmmu = devm_kzalloc(smmu->dev, sizeof(*qsmmu), GFP_KERNEL); @@ -75,7 +100,11 @@ struct arm_smmu_device *qcom_smmu_impl_init(struct arm_smmu_device *smmu) qsmmu->smmu = *smmu; - qsmmu->smmu.impl = &qcom_smmu500_impl; + if (of_device_is_compatible(np, "qcom,sdm660-smmu-v2")) { + qsmmu->smmu.impl = &qcom_smmuv2_impl; + } else { + qsmmu->smmu.impl = &qcom_smmu500_impl; + } devm_kfree(smmu->dev, smmu); return &qsmmu->smmu; -- 2.28.0 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel