From: Samuel Holland <samuel@sholland.org>
To: Mark Brown <broonie@kernel.org>,
Liam Girdwood <lgirdwood@gmail.com>,
Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>
Cc: Ondrej Jirman <megous@megous.com>,
alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Samuel Holland <samuel@sholland.org>
Subject: [PATCH 07/25] ASoC: sun8i-codec: Enable AIF mono/stereo control
Date: Wed, 30 Sep 2020 21:11:30 -0500 [thread overview]
Message-ID: <20201001021148.15852-8-samuel@sholland.org> (raw)
In-Reply-To: <20201001021148.15852-1-samuel@sholland.org>
Each left/right pair of AIF input/output channels can be swapped or
combined. This is useful for sending a mono audio source to both sides
of a stereo sink, or for creating complex mixing scenarios.
Add the support to control this feature from userspace.
Signed-off-by: Samuel Holland <samuel@sholland.org>
---
sound/soc/sunxi/sun8i-codec.c | 82 ++++++++++++++++++++++++++++++++---
1 file changed, 76 insertions(+), 6 deletions(-)
diff --git a/sound/soc/sunxi/sun8i-codec.c b/sound/soc/sunxi/sun8i-codec.c
index 2c89974243e1..578c0c0e6330 100644
--- a/sound/soc/sunxi/sun8i-codec.c
+++ b/sound/soc/sunxi/sun8i-codec.c
@@ -49,19 +49,23 @@
#define SUN8I_AIF1CLK_CTRL_AIF1_BCLK_DIV 9
#define SUN8I_AIF1CLK_CTRL_AIF1_LRCK_DIV 6
#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ 4
#define SUN8I_AIF1CLK_CTRL_AIF1_WORD_SIZ_16 (1 << 4)
#define SUN8I_AIF1CLK_CTRL_AIF1_DATA_FMT 2
#define SUN8I_AIF1_ADCDAT_CTRL 0x044
#define SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0L_ENA 15
#define SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0R_ENA 14
+#define SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0L_SRC 10
+#define SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0R_SRC 8
#define SUN8I_AIF1_DACDAT_CTRL 0x048
#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA 15
#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA 14
+#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_SRC 10
+#define SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_SRC 8
#define SUN8I_AIF1_MXR_SRC 0x04c
#define SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF1DA0L 15
#define SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF2DACL 14
#define SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_ADCL 13
#define SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF2DACR 12
#define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF1DA0R 11
#define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACR 10
#define SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_ADCR 9
@@ -327,16 +331,30 @@ static int sun8i_codec_hw_params(struct snd_pcm_substream *substream,
regmap_update_bits(scodec->regmap, SUN8I_SYS_SR_CTRL,
SUN8I_SYS_SR_CTRL_AIF1_FS_MASK,
sample_rate << SUN8I_SYS_SR_CTRL_AIF1_FS);
return 0;
}
+static const char *const sun8i_aif_stereo_mux_enum_values[] = {
+ "Stereo", "Reverse Stereo", "Sum Mono", "Mix Mono"
+};
+
+static SOC_ENUM_DOUBLE_DECL(sun8i_aif1_ad0_stereo_mux_enum,
+ SUN8I_AIF1_ADCDAT_CTRL,
+ SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0L_SRC,
+ SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0R_SRC,
+ sun8i_aif_stereo_mux_enum_values);
+
+static const struct snd_kcontrol_new sun8i_aif1_ad0_stereo_mux_control =
+ SOC_DAPM_ENUM("AIF1 AD0 Stereo Capture Route",
+ sun8i_aif1_ad0_stereo_mux_enum);
+
static const struct snd_kcontrol_new sun8i_aif1_ad0_mixer_controls[] = {
SOC_DAPM_DOUBLE("AIF1 Slot 0 Digital ADC Capture Switch",
SUN8I_AIF1_MXR_SRC,
SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF1DA0L,
SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF1DA0R, 1, 0),
SOC_DAPM_DOUBLE("AIF2 Digital ADC Capture Switch",
SUN8I_AIF1_MXR_SRC,
SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF2DACL,
@@ -346,16 +364,26 @@ static const struct snd_kcontrol_new sun8i_aif1_ad0_mixer_controls[] = {
SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_ADCL,
SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_ADCR, 1, 0),
SOC_DAPM_DOUBLE("AIF2 Inv Digital ADC Capture Switch",
SUN8I_AIF1_MXR_SRC,
SUN8I_AIF1_MXR_SRC_AD0L_MXR_SRC_AIF2DACR,
SUN8I_AIF1_MXR_SRC_AD0R_MXR_SRC_AIF2DACL, 1, 0),
};
+static SOC_ENUM_DOUBLE_DECL(sun8i_aif1_da0_stereo_mux_enum,
+ SUN8I_AIF1_DACDAT_CTRL,
+ SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_SRC,
+ SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_SRC,
+ sun8i_aif_stereo_mux_enum_values);
+
+static const struct snd_kcontrol_new sun8i_aif1_da0_stereo_mux_control =
+ SOC_DAPM_ENUM("AIF1 DA0 Stereo Playback Route",
+ sun8i_aif1_da0_stereo_mux_enum);
+
static const struct snd_kcontrol_new sun8i_dac_mixer_controls[] = {
SOC_DAPM_DOUBLE("AIF1 Slot 0 Digital DAC Playback Switch",
SUN8I_DAC_MXR_SRC,
SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA0L,
SUN8I_DAC_MXR_SRC_DACR_MXR_SRC_AIF1DA0R, 1, 0),
SOC_DAPM_DOUBLE("AIF1 Slot 1 Digital DAC Playback Switch",
SUN8I_DAC_MXR_SRC,
SUN8I_DAC_MXR_SRC_DACL_MXR_SRC_AIF1DA1L,
@@ -412,22 +440,34 @@ static const struct snd_soc_dapm_widget sun8i_codec_dapm_widgets[] = {
/* AIF "ADC" Outputs */
SND_SOC_DAPM_AIF_OUT("AIF1 AD0L", "Capture", 0,
SUN8I_AIF1_ADCDAT_CTRL,
SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0L_ENA, 0),
SND_SOC_DAPM_AIF_OUT("AIF1 AD0R", "Capture", 1,
SUN8I_AIF1_ADCDAT_CTRL,
SUN8I_AIF1_ADCDAT_CTRL_AIF1_AD0R_ENA, 0),
+ /* AIF "ADC" Mono/Stereo Muxes */
+ SND_SOC_DAPM_MUX("AIF1 AD0L Stereo Mux", SND_SOC_NOPM, 0, 0,
+ &sun8i_aif1_ad0_stereo_mux_control),
+ SND_SOC_DAPM_MUX("AIF1 AD0R Stereo Mux", SND_SOC_NOPM, 0, 0,
+ &sun8i_aif1_ad0_stereo_mux_control),
+
/* AIF "ADC" Mixers */
SOC_MIXER_ARRAY("AIF1 AD0L Mixer", SND_SOC_NOPM, 0, 0,
sun8i_aif1_ad0_mixer_controls),
SOC_MIXER_ARRAY("AIF1 AD0R Mixer", SND_SOC_NOPM, 0, 0,
sun8i_aif1_ad0_mixer_controls),
+ /* AIF "DAC" Mono/Stereo Muxes */
+ SND_SOC_DAPM_MUX("AIF1 DA0L Stereo Mux", SND_SOC_NOPM, 0, 0,
+ &sun8i_aif1_da0_stereo_mux_control),
+ SND_SOC_DAPM_MUX("AIF1 DA0R Stereo Mux", SND_SOC_NOPM, 0, 0,
+ &sun8i_aif1_da0_stereo_mux_control),
+
/* AIF "DAC" Inputs */
SND_SOC_DAPM_AIF_IN("AIF1 DA0L", "Playback", 0,
SUN8I_AIF1_DACDAT_CTRL,
SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0L_ENA, 0),
SND_SOC_DAPM_AIF_IN("AIF1 DA0R", "Playback", 1,
SUN8I_AIF1_DACDAT_CTRL,
SUN8I_AIF1_DACDAT_CTRL_AIF1_DA0R_ENA, 0),
@@ -468,35 +508,65 @@ static const struct snd_soc_dapm_route sun8i_codec_dapm_routes[] = {
{ "CLK DAC", NULL, "SYSCLK" },
{ "RST DAC", NULL, "CLK DAC" },
{ "DAC", NULL, "RST DAC" },
{ "DACL", NULL, "DAC" },
{ "DACR", NULL, "DAC" },
/* AIF "ADC" Output Routes */
- { "AIF1 AD0L", NULL, "AIF1 AD0L Mixer" },
- { "AIF1 AD0R", NULL, "AIF1 AD0R Mixer" },
+ { "AIF1 AD0L", NULL, "AIF1 AD0L Stereo Mux" },
+ { "AIF1 AD0R", NULL, "AIF1 AD0R Stereo Mux" },
+
+ /* AIF "ADC" Mono/Stereo Mux Routes */
+ { "AIF1 AD0L Stereo Mux", "Stereo", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0L Stereo Mux", "Reverse Stereo", "AIF1 AD0R Mixer" },
+ { "AIF1 AD0L Stereo Mux", "Sum Mono", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0L Stereo Mux", "Sum Mono", "AIF1 AD0R Mixer" },
+ { "AIF1 AD0L Stereo Mux", "Mix Mono", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0L Stereo Mux", "Mix Mono", "AIF1 AD0R Mixer" },
+
+ { "AIF1 AD0R Stereo Mux", "Stereo", "AIF1 AD0R Mixer" },
+ { "AIF1 AD0R Stereo Mux", "Reverse Stereo", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0R Stereo Mux", "Sum Mono", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0R Stereo Mux", "Sum Mono", "AIF1 AD0R Mixer" },
+ { "AIF1 AD0R Stereo Mux", "Mix Mono", "AIF1 AD0L Mixer" },
+ { "AIF1 AD0R Stereo Mux", "Mix Mono", "AIF1 AD0R Mixer" },
/* AIF "ADC" Mixer Routes */
- { "AIF1 AD0L Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0L" },
+ { "AIF1 AD0L Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0L Stereo Mux" },
{ "AIF1 AD0L Mixer", "AIF1 Data Digital ADC Capture Switch", "ADCL" },
- { "AIF1 AD0R Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0R" },
+ { "AIF1 AD0R Mixer", "AIF1 Slot 0 Digital ADC Capture Switch", "AIF1 DA0R Stereo Mux" },
{ "AIF1 AD0R Mixer", "AIF1 Data Digital ADC Capture Switch", "ADCR" },
+ /* AIF "DAC" Mono/Stereo Mux Routes */
+ { "AIF1 DA0L Stereo Mux", "Stereo", "AIF1 DA0L" },
+ { "AIF1 DA0L Stereo Mux", "Reverse Stereo", "AIF1 DA0R" },
+ { "AIF1 DA0L Stereo Mux", "Sum Mono", "AIF1 DA0L" },
+ { "AIF1 DA0L Stereo Mux", "Sum Mono", "AIF1 DA0R" },
+ { "AIF1 DA0L Stereo Mux", "Mix Mono", "AIF1 DA0L" },
+ { "AIF1 DA0L Stereo Mux", "Mix Mono", "AIF1 DA0R" },
+
+ { "AIF1 DA0R Stereo Mux", "Stereo", "AIF1 DA0R" },
+ { "AIF1 DA0R Stereo Mux", "Reverse Stereo", "AIF1 DA0L" },
+ { "AIF1 DA0R Stereo Mux", "Sum Mono", "AIF1 DA0L" },
+ { "AIF1 DA0R Stereo Mux", "Sum Mono", "AIF1 DA0R" },
+ { "AIF1 DA0R Stereo Mux", "Mix Mono", "AIF1 DA0L" },
+ { "AIF1 DA0R Stereo Mux", "Mix Mono", "AIF1 DA0R" },
+
/* DAC Output Routes */
{ "DACL", NULL, "DACL Mixer" },
{ "DACR", NULL, "DACR Mixer" },
/* DAC Mixer Routes */
- { "DACL Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0L" },
+ { "DACL Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0L Stereo Mux" },
{ "DACL Mixer", "ADC Digital DAC Playback Switch", "ADCL" },
- { "DACR Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0R" },
+ { "DACR Mixer", "AIF1 Slot 0 Digital DAC Playback Switch", "AIF1 DA0R Stereo Mux" },
{ "DACR Mixer", "ADC Digital DAC Playback Switch", "ADCR" },
};
static const struct snd_soc_dapm_widget sun8i_codec_legacy_widgets[] = {
/* Legacy ADC Inputs (connected to analog codec DAPM context) */
SND_SOC_DAPM_ADC("AIF1 Slot 0 Left ADC", NULL, SND_SOC_NOPM, 0, 0),
SND_SOC_DAPM_ADC("AIF1 Slot 0 Right ADC", NULL, SND_SOC_NOPM, 0, 0),
--
2.26.2
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next prev parent reply other threads:[~2020-10-01 2:16 UTC|newest]
Thread overview: 60+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-01 2:11 [PATCH 00/25] ASoC: sun8i-codec: support for AIF2 and AIF3 Samuel Holland
2020-10-01 2:11 ` [PATCH 01/25] ASoC: sun8i-codec: Set up clock tree at probe time Samuel Holland
2020-10-05 9:53 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 02/25] ASoC: sun8i-codec: Swap module clock/reset dependencies Samuel Holland
2020-10-05 9:54 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 03/25] ASoC: sun8i-codec: Sort DAPM controls, widgets, and routes Samuel Holland
2020-10-05 9:54 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 04/25] ASoC: sun8i-codec: Consistently name DAPM widgets " Samuel Holland
2020-10-05 9:57 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 05/25] ASoC: sun8i-codec: Correct DAPM widget types Samuel Holland
2020-10-05 9:57 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 06/25] ASoC: sun8i-codec: Fix AIF widget channel references Samuel Holland
2020-10-05 10:00 ` Maxime Ripard
2020-10-01 2:11 ` Samuel Holland [this message]
2020-10-05 10:00 ` [PATCH 07/25] ASoC: sun8i-codec: Enable AIF mono/stereo control Maxime Ripard
2020-10-01 2:11 ` [PATCH 08/25] ASoC: sun8i-codec: Use snd_soc_dai_get_drvdata Samuel Holland
2020-10-05 10:01 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 09/25] ASoC: sun8i-codec: Prepare to extend the DAI driver Samuel Holland
2020-10-05 11:24 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 10/25] ASoC: sun8i-codec: Program format before clock inversion Samuel Holland
2020-10-05 11:26 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 11/25] ASoC: sun8i-codec: Enable all supported clock inversions Samuel Holland
2020-10-05 11:30 ` Maxime Ripard
2020-10-06 4:29 ` Samuel Holland
2020-10-08 12:59 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 12/25] ASoC: sun8i-codec: Program the correct word size Samuel Holland
2020-10-05 11:30 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 13/25] ASoC: sun8i-codec: Round up the LRCK divisor Samuel Holland
2020-10-05 11:31 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 14/25] ASoC: sun8i-codec: Correct the BCLK divisor calculation Samuel Holland
2020-10-05 11:34 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 15/25] ASoC: sun8i-codec: Support the TDM slot binding Samuel Holland
2020-10-05 11:34 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 16/25] ASoC: sun8i-codec: Enforce symmetric DAI parameters Samuel Holland
2020-10-05 11:39 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 17/25] ASoC: sun8i-codec: Enable all supported sample rates Samuel Holland
2020-10-05 11:39 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 18/25] ASoC: sun8i-codec: Automatically set the system sample rate Samuel Holland
2020-10-05 11:58 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 19/25] ASoC: sun8i-codec: Constrain to compatible sample rates Samuel Holland
2020-10-05 11:59 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 20/25] ASoC: sun8i-codec: Protect the clock rate while streams are open Samuel Holland
2020-10-01 13:27 ` kernel test robot
2020-10-05 12:01 ` Maxime Ripard
2020-10-05 13:15 ` Chen-Yu Tsai
2020-10-06 4:46 ` Samuel Holland
2020-10-06 4:43 ` Samuel Holland
2020-10-08 13:02 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 21/25] ASoC: sun8i-codec: Require an exact BCLK divisor match Samuel Holland
2020-10-05 12:01 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 22/25] ASoC: sun8i-codec: Enable all supported PCM formats Samuel Holland
2020-10-05 12:02 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 23/25] ASoC: sun8i-codec: Generalize AIF clock control Samuel Holland
2020-10-05 12:04 ` Maxime Ripard
2020-10-06 4:51 ` Samuel Holland
2020-10-12 11:17 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 24/25] ASoC: sun8i-codec: Add a DAI, widgets, and routes for AIF2 Samuel Holland
2020-10-05 12:05 ` Maxime Ripard
2020-10-01 2:11 ` [PATCH 25/25] ASoC: sun8i-codec: Add a DAI, widgets, and routes for AIF3 Samuel Holland
2020-10-05 17:54 ` [PATCH 00/25] ASoC: sun8i-codec: support for AIF2 and AIF3 Mark Brown
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