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Thu, 08 Oct 2020 04:02:44 -0700 (PDT) Date: Thu, 8 Oct 2020 16:32:41 +0530 From: Viresh Kumar To: Nicola Mazzucato Subject: Re: [PATCH v2 2/2] [RFC] CPUFreq: Add support for cpu-perf-dependencies Message-ID: <20201008110241.dcyxdtqqj7slwmnc@vireshk-i7> References: <20200924095347.32148-1-nicola.mazzucato@arm.com> <20200924095347.32148-3-nicola.mazzucato@arm.com> <20201006071909.3cgz7i5v35dgnuzn@vireshk-i7> <2417d7b5-bc58-fa30-192c-e5991ec22ce0@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <2417d7b5-bc58-fa30-192c-e5991ec22ce0@arm.com> User-Agent: NeoMutt/20180716-391-311a52 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201008_070249_078961_A936D615 X-CRM114-Status: GOOD ( 20.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, linux-pm@vger.kernel.org, vireshk@kernel.org, daniel.lezcano@linaro.org, rjw@rjwysocki.net, linux-kernel@vger.kernel.org, robh+dt@kernel.org, sudeep.holla@arm.com, chris.redpath@arm.com, morten.rasmussen@arm.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 07-10-20, 13:58, Nicola Mazzucato wrote: > Hi Viresh, > > performance controls is what is exposed by the firmware through a protocol that > is not capable of describing hardware (say SCMI). For example, the firmware can > tell that the platform has N controls, but it can't say to which hardware they > are "wired" to. This is done in dt, where, for example, we map these controls > to cpus, gpus, etc. > > Let's focus on cpus. > > Normally we would have N of performance controls (what comes from f/w) > that that correspond to hardware clock/dvfs domains. > > However, some firmware implementations might benefit from having finer > grained information about the performance requirements (e.g. > per-CPU) and therefore choose to present M performance controls to the > OS. DT would be adjusted accordingly to "wire" these controls to cpus > or set of cpus. > In this scenario, the f/w will make aggregation decisions based on the > requests it receives on these M controls. > > Here we would have M cpufreq policies which do not necessarily reflect the > underlying clock domains, thus some s/w components will underperform > (EAS and thermal, for example). > > A real example would be a platform in which the firmware describes the system > having M per-cpu control, and the cpufreq subsystem will have M policies while > in fact these cpus are "performance-dependent" each other (e.g. are in the same > clock domain). If the CPUs are in the same clock domain, they must be part of the same cpufreq policy. > This performance dependency information is essential for some > components that take information from the cpufreq policy. > > To restore functionality we can use the optional node > 'cpu-performance-dependencies' in dt which will provide such dependency > information and we can add a new cpumask 'dependency_cpus' in policy. > > Hope it gives some clarity. Some, but I am still confused :( Can you give a real example, with exact number of CPUs, how they share clocks/voltage domains and what else the firmware needs in terms of performance-domains ? That may make it easier for me to understand it. -- viresh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel