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Tue, 20 Oct 2020 12:28:13 -0400 X-MC-Unique: -84pZLXgMUu-r8P4wkT6pA-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 13F7E1084C88; Tue, 20 Oct 2020 16:28:12 +0000 (UTC) Received: from treble (ovpn-118-22.rdu2.redhat.com [10.10.118.22]) by smtp.corp.redhat.com (Postfix) with ESMTPS id DB0EB5B4A3; Tue, 20 Oct 2020 16:28:09 +0000 (UTC) Date: Tue, 20 Oct 2020 11:28:06 -0500 From: Josh Poimboeuf To: Mark Brown Subject: Re: [RFC PATCH 0/3] arm64: Implement reliable stack trace Message-ID: <20201020162806.6kl6japxkij7dzel@treble> References: <20201012172605.10715-1-broonie@kernel.org> <20201015141612.GC50416@C02TD0UTHF1T.local> <20201015154951.GD4390@sirena.org.uk> <20201015212931.mh4a5jt7pxqlzxsg@treble> <20201016121534.GC5274@sirena.org.uk> <20201019234155.q26jkm22fhnnztiw@treble> <20201020153913.GE9448@sirena.org.uk> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201020153913.GE9448@sirena.org.uk> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201020_122818_341034_82C4F29D X-CRM114-Status: GOOD ( 20.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , linux-kernel@vger.kernel.org, live-patching@vger.kernel.org, Miroslav Benes , Will Deacon , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, Oct 20, 2020 at 04:39:13PM +0100, Mark Brown wrote: > On Mon, Oct 19, 2020 at 06:41:55PM -0500, Josh Poimboeuf wrote: > > On Fri, Oct 16, 2020 at 01:15:34PM +0100, Mark Brown wrote: > > > > Ah, I'd have interpreted "defined thread entry point" as meaning > > > expecting to find specific functions appering at the end of the stack > > > rather than meaning positively identifying the end of the stack - for > > > arm64 we use a NULL frame pointer to indicate this in all situations. > > > In that case that's one bit that is already clear. > > > I think a NULL frame pointer isn't going to be robust enough. For > > example NULL could easily be introduced by a corrupt stack, or by asm > > frame pointer misuse. > > Is it just the particular poison value that you're concerned about here > or are you looking for additional checks of some other kind? You just need to know you've conclusively reached the user entry point on the stack, without missing any functions. A sufficiently unique poison value might be ok. Though, defining a certain stack offset as the "end" seems more robust. -- Josh _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel