From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67459C4363A for ; Mon, 26 Oct 2020 13:20:51 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0D5B622265 for ; Mon, 26 Oct 2020 13:20:51 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="XwSrZA6z"; dkim=fail reason="signature verification failed" (1024-bit key) header.d=kernel.org header.i=@kernel.org header.b="bfacPaOY" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 0D5B622265 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=w3e8CsRfl17rLydLf5ddaiICmE1C3Vape+18USs6gHY=; b=XwSrZA6zuz7xNV/KUzbEksjEo o9c3BLjeuFQWYCxlwT6LTtserE/tBl/+11suSx6q7h1nhg+AoX+SmB39Hb7HpMmkyE7AHPhCfA8ln udPECzYRy2RS8GUnCJ5LQCQdtM/+pDka1j9d9GV6fxKhuANRJgCKD80SMKskO8wgnt0dmdAMCFZZA qlCYYFZXXw0IoOuq48JXQmfnOjwKK/hShPiqy68qN0IuOLob4ZO+awuqk7TP3klJSIauJ/g1Pc8TG kzLqfQugcgC5YCDB1BmWiCq84RpxdLJAFpfaxpc52voVetEWHcZuSnBRpBhcBYAh+DJRG8VCeFXV/ cxzcGalDw==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX2PE-00046z-30; Mon, 26 Oct 2020 13:19:24 +0000 Received: from mail.kernel.org ([198.145.29.99]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kX2PB-00046K-E6 for linux-arm-kernel@lists.infradead.org; Mon, 26 Oct 2020 13:19:22 +0000 Received: from willie-the-truck (236.31.169.217.in-addr.arpa [217.169.31.236]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 584A422263; Mon, 26 Oct 2020 13:19:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1603718360; bh=BcTmLpM72aN5rRNqD0LO5+HZPNLFaK3Os41pMHM6pjA=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=bfacPaOYLsf6FvKADlPAhFckRlcSeSLhLbNZizdOs6UC1MBpwYcmByFrG6RllU/+P W1U2BHzwpTliN+BmBROtcAk2dKvv4h8FTcrLBsDjXk4ofn6amOUx8btKqhC/Qvv7Xz M82s3pB0stQ5PxHOhai/reou+zcpTrSt+oJoYUq0= Date: Mon, 26 Oct 2020 13:19:16 +0000 From: Will Deacon To: Marc Zyngier Subject: Re: [PATCH v6 2/2] arm64: Add workaround for Arm Cortex-A77 erratum 1508412 Message-ID: <20201026131915.GB24349@willie-the-truck> References: <20200924134853.2696503-1-robh@kernel.org> <20200924134853.2696503-2-robh@kernel.org> <84a0a7cbc28ddb5a9e421f666cb8fbb1@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <84a0a7cbc28ddb5a9e421f666cb8fbb1@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201026_091921_607934_5D51CBA4 X-CRM114-Status: GOOD ( 29.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Rob Herring , Suzuki K Poulose , Catalin Marinas , James Morse , linux-arm-kernel , kvmarm@lists.cs.columbia.edu, Julien Thierry Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Oct 21, 2020 at 11:05:10AM +0100, Marc Zyngier wrote: > On 2020-10-20 15:40, Rob Herring wrote: > > On Thu, Sep 24, 2020 at 8:48 AM Rob Herring wrote: > > > > > > On Cortex-A77 r0p0 and r1p0, a sequence of a non-cacheable or device > > > load > > > and a store exclusive or PAR_EL1 read can cause a deadlock. > > > > > > The workaround requires a DMB SY before and after a PAR_EL1 register > > > read. In addition, it's possible an interrupt (doing a device read) or > > > KVM guest exit could be taken between the DMB and PAR read, so we > > > also need a DMB before returning from interrupt and before returning > > > to > > > a guest. > > > > > > A deadlock is still possible with the workaround as KVM guests must > > > also > > > have the workaround. IOW, a malicious guest can deadlock an affected > > > systems. > > > > > > This workaround also depends on a firmware counterpart to enable the > > > h/w > > > to insert DMB SY after load and store exclusive instructions. See the > > > errata document SDEN-1152370 v10 [1] for more information. > > > > > > [1] https://static.docs.arm.com/101992/0010/Arm_Cortex_A77_MP074_Software_Developer_Errata_Notice_v10.pdf > > > > > > Cc: Catalin Marinas > > > Cc: James Morse > > > Cc: Suzuki K Poulose > > > Cc: Will Deacon > > > Cc: Marc Zyngier > > > Cc: Julien Thierry > > > Cc: kvmarm@lists.cs.columbia.edu > > > Signed-off-by: Rob Herring > > > --- > > > v6: > > > - Do dmb on kernel_exit rather than disabling interrupts around PAR > > > read > > > v5: > > > - Rebase on v5.9-rc3 > > > - Disable interrupts around PAR reads > > > - Add DMB on return to guest > > > > > > v4: > > > - Move read_sysreg_par out of KVM code to sysreg.h to share > > > - Also use read_sysreg_par in fault.c and kvm/sys_regs.c > > > - Use alternative f/w for dmbs around PAR read > > > - Use cpus_have_final_cap instead of cpus_have_const_cap > > > - Add note about speculation of PAR read > > > > > > v3: > > > - Add dmbs around PAR reads in KVM code > > > - Clean-up 'work-around' and 'errata' > > > > > > v2: > > > - Don't disable KVM, just print warning > > > --- > > > Documentation/arm64/silicon-errata.rst | 2 ++ > > > arch/arm64/Kconfig | 20 ++++++++++++++++++++ > > > arch/arm64/include/asm/cpucaps.h | 3 ++- > > > arch/arm64/include/asm/sysreg.h | 9 +++++++++ > > > arch/arm64/kernel/cpu_errata.c | 10 ++++++++++ > > > arch/arm64/kernel/entry.S | 3 +++ > > > arch/arm64/kvm/arm.c | 3 ++- > > > arch/arm64/kvm/hyp/include/hyp/switch.h | 21 +++++++++++++-------- > > > arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 2 +- > > > arch/arm64/kvm/hyp/nvhe/switch.c | 2 +- > > > arch/arm64/kvm/hyp/vhe/switch.c | 2 +- > > > arch/arm64/kvm/sys_regs.c | 2 +- > > > arch/arm64/mm/fault.c | 2 +- > > > 13 files changed, 66 insertions(+), 15 deletions(-) > > > > Marc, Can I get an ack for KVM on this? Will is waiting for one before > > applying. > > Here you go: > > Acked-by: Marc Zyngier Cheers, Marc. Rob -- can you repost this based on -rc1 please? Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel