From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B177CC2D0A3 for ; Thu, 29 Oct 2020 11:47:21 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 3A57D20780 for ; Thu, 29 Oct 2020 11:47:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="k1soQUps" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3A57D20780 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=infradead.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=3r4s0HGKqAfwewW6j70vEdPCEgi44giExunu64rXBH8=; b=k1soQUps1x1Xdc21T0WwFobh2 0MpxK8unegDHEpJr4cisNgPCWZA9/I7N7jzS+Ui6sEgp+MNHq+eOhY2pq0ZKXolHGTBQLdjT3ikkt iBdFuWbj3dp6gNF/8k0vhk/lNkDcURtItdGpul2ab+PPPHeiNkGGn/bddOXnylUMrHMRKtvnJ0Rxl 0z1wC3wi2qo94DNL94TWsgAKZGduSz6H7NYJw4eD+p2RpeShuep+ZYVA8FzCJja27wwHObH/VMjvt cyxR4TzvqOa8b7/IbOek9vG1XpX/44bObFuyyG1O6X1SdZlYtEZdnEOaSENbQ9c5bfXVVtrlY2TpL h91XbeP/Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kY6Nd-0003Jd-Ie; Thu, 29 Oct 2020 11:46:09 +0000 Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by merlin.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1kY6Na-0003JB-Vy; Thu, 29 Oct 2020 11:46:07 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id C5A41301179; Thu, 29 Oct 2020 12:46:05 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id B77922C3243FD; Thu, 29 Oct 2020 12:46:05 +0100 (CET) Date: Thu, 29 Oct 2020 12:46:05 +0100 From: Peter Zijlstra To: Ard Biesheuvel Subject: Re: [PATCH v2] arm64: implement support for static call trampolines Message-ID: <20201029114605.GM2628@hirez.programming.kicks-ass.net> References: <20201028184114.6834-1-ardb@kernel.org> <20201029104007.GK2628@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Catalin Marinas , Will Deacon , James Morse , Linux ARM Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, Oct 29, 2020 at 11:58:52AM +0100, Ard Biesheuvel wrote: > On Thu, 29 Oct 2020 at 11:40, Peter Zijlstra wrote: > > Would it make things easier if your trampoline consisted of two complete > > slots, between which you can flip? > > > > Something like: > > > > 0x00 B 0x24 / NOP > > 0x04 < slot 1 > > > .... > > 0x20 > > 0x24 < slot 2 > > > .... > > 0x40 > > > > Then each (20 byte) slot can contain any of the variants above and you > > can write the unused slot without stop-machine. Then, when the unused > > slot is populated, flip the initial instruction (like a static-branch), > > issue synchronize_rcu_tasks() and flip to using the other slot for next > > time. > > > > Once we've populated a slot and activated it, we have to assume that > it is live and we can no longer modify it freely. Urhm how so? Once you pass through synchronize_rcu_tasks() nobody should still be using the old one. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel