From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCF0CC55178 for ; Thu, 5 Nov 2020 17:45:14 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 42E50206CA for ; Thu, 5 Nov 2020 17:45:14 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="DfTl3YL7" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 42E50206CA Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=pengutronix.de Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Transfer-Encoding: Content-Type:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:Subject:MIME-Version:Message-Id:Date:To:From: Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender :Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=YATcCLoQ/kjVQG16W78INsbuPGdTeYzNPC5ly/leLzk=; b=DfTl3YL76ije9O+S0qZmc6seRx mlHDF3EiLjcXcHp0Z20oOQRLQnkFxXT0e713M7E8IVHavzE5kGK48QcNWBikktDa1rt93rfVL8BEI 8ZLCr5dBMw2fVIYKdcYxgt5gCTX8JUrgF/GUEvRVQEinVCPeHA+ypkCRLv33slqcYLhyBuqvqILUa s9KoOtyeFBFeA1parXoJhyU2mDs7f7qeOpd9CE1ZauGTGpE8Zv1Fi5EImz+84bjEvTiAOmj0aqajQ OEQDlxuCI+YYKIgJmP46tmiV08cGJblyPU9DJMkvhWLLg+s8nYuw8vgYt4LA9fd+G531DbZ2gsvS/ PWZgQ6/g==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1kajJZ-0008Kj-Fr; Thu, 05 Nov 2020 17:44:49 +0000 Received: from metis.ext.pengutronix.de ([2001:67c:670:201:290:27ff:fe1d:cc33]) by merlin.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1kajJT-0008Hz-N8 for linux-arm-kernel@lists.infradead.org; Thu, 05 Nov 2020 17:44:44 +0000 Received: from [2a0a:edc0:0:1101:1d::39] (helo=dude03.red.stw.pengutronix.de) by metis.ext.pengutronix.de with esmtp (Exim 4.92) (envelope-from ) id 1kajJM-0005qB-0h; Thu, 05 Nov 2020 18:44:36 +0100 From: Lucas Stach To: Shawn Guo , Rob Herring Date: Thu, 5 Nov 2020 18:44:21 +0100 Message-Id: <20201105174434.1817539-1-l.stach@pengutronix.de> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:1101:1d::39 X-SA-Exim-Mail-From: l.stach@pengutronix.de Subject: [PATCH v2 00/13] i.MX8MM power domain support X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on metis.ext.pengutronix.de) X-PTX-Original-Recipient: linux-arm-kernel@lists.infradead.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20201105_124443_818552_C6F70A4E X-CRM114-Status: GOOD ( 13.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , devicetree@vger.kernel.org, Fabio Estevam , Frieder Schrempf , patchwork-lst@pengutronix.de, NXP Linux Team , kernel@pengutronix.de, Adam Ford , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi all, this is the second revision of the patchset to add power domain control for the i.MX8MM SoC to the GPCv2 driver. For now I've dropped all support (both DT binding and code) for the power domains that contain a blk-ctl. Support for those is still under development and will probably require some more discussions to get things right. However the cut-down functionality provided by this series is already a big step forward, as it allows to use USB controllers and GPUs on the i.MX8MM, without the need to statically turn on the respective power domains before jumping into Linux. Regards, Lucas Lucas Stach (13): soc: imx: gpcv2: move to more ideomatic error handling in probe soc: imx: gpcv2: move domain mapping to domain driver probe soc: imx: gpcv2: switch to clk_bulk_* API soc: imx: gpcv2: split power up and power down sequence control soc: imx: gpcv2: wait for ADB400 handshake soc: imx: gpcv2: add runtime PM support for power-domains soc: imx: gpcv2: allow domains without power-sequence control dt-bindings: imx: gpcv2: add support for optional resets soc: imx: gpcv2: add support for optional resets dt-bindings: add defines for i.MX8MM power domains soc: imx: gpcv2: add support for i.MX8MM power domains arm64: dts: imx8mm: add GPC node and power domains arm64: dts: imx8mm: put USB controllers into power-domains .../bindings/power/fsl,imx-gpcv2.yaml | 9 + arch/arm64/boot/dts/freescale/imx8mm.dtsi | 60 +++ drivers/soc/imx/gpcv2.c | 467 +++++++++++++----- include/dt-bindings/power/imx8mm-power.h | 16 + 4 files changed, 438 insertions(+), 114 deletions(-) create mode 100644 include/dt-bindings/power/imx8mm-power.h -- 2.20.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel