From: Lucas Stach <l.stach@pengutronix.de>
To: Shawn Guo <shawnguo@kernel.org>, Rob Herring <robh+dt@kernel.org>
Cc: Marek Vasut <marex@denx.de>,
devicetree@vger.kernel.org, Fabio Estevam <festevam@gmail.com>,
Frieder Schrempf <frieder.schrempf@kontron.de>,
patchwork-lst@pengutronix.de, NXP Linux Team <linux-imx@nxp.com>,
kernel@pengutronix.de, Adam Ford <aford173@gmail.com>,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 05/13] soc: imx: gpcv2: wait for ADB400 handshake
Date: Thu, 5 Nov 2020 18:44:26 +0100 [thread overview]
Message-ID: <20201105174434.1817539-6-l.stach@pengutronix.de> (raw)
In-Reply-To: <20201105174434.1817539-1-l.stach@pengutronix.de>
New reference manuals show that there is actually a status bit for
the ADB400 handshake. Add a poll loop to wait for the ADB400 to
acknowledge our request.
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
drivers/soc/imx/gpcv2.c | 43 +++++++++++++++++++++++++++++++++--------
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index 7356e48ebdad..d27025e37a9e 100644
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -69,6 +69,9 @@
#define GPC_PU_PWRHSK 0x1fc
+#define IMX8M_GPU_HSK_PWRDNACKN BIT(26)
+#define IMX8M_VPU_HSK_PWRDNACKN BIT(25)
+#define IMX8M_DISP_HSK_PWRDNACKN BIT(24)
#define IMX8M_GPU_HSK_PWRDNREQN BIT(6)
#define IMX8M_VPU_HSK_PWRDNREQN BIT(5)
#define IMX8M_DISP_HSK_PWRDNREQN BIT(4)
@@ -112,7 +115,8 @@ struct imx_pgc_domain {
const struct {
u32 pxx;
u32 map;
- u32 hsk;
+ u32 hskreq;
+ u32 hskack;
} bits;
const int voltage;
@@ -172,9 +176,19 @@ static int imx_pgc_power_up(struct generic_pm_domain *genpd)
GPC_PGC_CTRL_PCR, 0);
/* request the ADB400 to power up */
- if (domain->bits.hsk)
+ if (domain->bits.hskreq) {
regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
- domain->bits.hsk, domain->bits.hsk);
+ domain->bits.hskreq, domain->bits.hskreq);
+
+ ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
+ reg_val,
+ (reg_val & domain->bits.hskack),
+ 0, USEC_PER_MSEC);
+ if (ret) {
+ dev_err(domain->dev, "failed to power up ADB400\n");
+ goto out_clk_disable;
+ }
+ }
/* Disable reset clocks for all devices in the domain */
clk_bulk_disable_unprepare(domain->num_clks, domain->clks);
@@ -204,9 +218,19 @@ static int imx_pgc_power_down(struct generic_pm_domain *genpd)
}
/* request the ADB400 to power down */
- if (domain->bits.hsk)
+ if (domain->bits.hskreq) {
regmap_update_bits(domain->regmap, GPC_PU_PWRHSK,
- domain->bits.hsk, 0);
+ domain->bits.hskreq, 0);
+
+ ret = regmap_read_poll_timeout(domain->regmap, GPC_PU_PWRHSK,
+ reg_val,
+ !(reg_val & domain->bits.hskack),
+ 0, USEC_PER_MSEC);
+ if (ret) {
+ dev_err(domain->dev, "failed to power down ADB400\n");
+ goto out_clk_disable;
+ }
+ }
/* enable power control */
regmap_update_bits(domain->regmap, GPC_PGC_CTRL(domain->pgc),
@@ -369,7 +393,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_GPU_SW_Pxx_REQ,
.map = IMX8M_GPU_A53_DOMAIN,
- .hsk = IMX8M_GPU_HSK_PWRDNREQN,
+ .hskreq = IMX8M_GPU_HSK_PWRDNREQN,
+ .hskack = IMX8M_GPU_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_GPU,
},
@@ -381,7 +406,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_VPU_SW_Pxx_REQ,
.map = IMX8M_VPU_A53_DOMAIN,
- .hsk = IMX8M_VPU_HSK_PWRDNREQN,
+ .hskreq = IMX8M_VPU_HSK_PWRDNREQN,
+ .hskack = IMX8M_VPU_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_VPU,
},
@@ -393,7 +419,8 @@ static const struct imx_pgc_domain imx8m_pgc_domains[] = {
.bits = {
.pxx = IMX8M_DISP_SW_Pxx_REQ,
.map = IMX8M_DISP_A53_DOMAIN,
- .hsk = IMX8M_DISP_HSK_PWRDNREQN,
+ .hskreq = IMX8M_DISP_HSK_PWRDNREQN,
+ .hskack = IMX8M_DISP_HSK_PWRDNACKN,
},
.pgc = IMX8M_PGC_DISP,
},
--
2.20.1
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next prev parent reply other threads:[~2020-11-05 17:45 UTC|newest]
Thread overview: 31+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-05 17:44 [PATCH v2 00/13] i.MX8MM power domain support Lucas Stach
2020-11-05 17:44 ` [PATCH v2 01/13] soc: imx: gpcv2: move to more ideomatic error handling in probe Lucas Stach
2020-11-16 14:10 ` Adam Ford
2020-11-05 17:44 ` [PATCH v2 02/13] soc: imx: gpcv2: move domain mapping to domain driver probe Lucas Stach
2020-11-05 17:44 ` [PATCH v2 03/13] soc: imx: gpcv2: switch to clk_bulk_* API Lucas Stach
2020-11-05 17:44 ` [PATCH v2 04/13] soc: imx: gpcv2: split power up and power down sequence control Lucas Stach
2020-11-05 17:44 ` Lucas Stach [this message]
2020-11-05 17:44 ` [PATCH v2 06/13] soc: imx: gpcv2: add runtime PM support for power-domains Lucas Stach
2020-11-05 17:44 ` [PATCH v2 07/13] soc: imx: gpcv2: allow domains without power-sequence control Lucas Stach
2020-11-05 17:44 ` [PATCH v2 08/13] dt-bindings: imx: gpcv2: add support for optional resets Lucas Stach
2020-11-09 20:15 ` Rob Herring
2020-11-17 14:11 ` Lucas Stach
2020-11-30 9:57 ` Lucas Stach
2021-02-10 14:35 ` Lucas Stach
2021-02-10 14:42 ` Marek Vasut
2021-04-26 9:24 ` Frieder Schrempf
2021-04-29 14:38 ` Frieder Schrempf
2021-03-22 18:19 ` Adam Ford
2020-11-05 17:44 ` [PATCH v2 09/13] soc: " Lucas Stach
2020-11-05 17:44 ` [PATCH v2 10/13] dt-bindings: add defines for i.MX8MM power domains Lucas Stach
2020-11-09 20:34 ` Rob Herring
2020-11-05 17:44 ` [PATCH v2 11/13] soc: imx: gpcv2: add support " Lucas Stach
2020-11-05 17:44 ` [PATCH v2 12/13] arm64: dts: imx8mm: add GPC node and " Lucas Stach
2020-12-09 15:26 ` Frieder Schrempf
2021-01-14 10:39 ` Frieder Schrempf
2021-02-18 12:54 ` Adam Ford
2021-02-18 15:19 ` Adam Ford
2021-03-02 15:01 ` Frieder Schrempf
2021-03-02 16:46 ` Adam Ford
2020-11-05 17:44 ` [PATCH v2 13/13] arm64: dts: imx8mm: put USB controllers into power-domains Lucas Stach
2021-05-06 1:04 [PATCH V2 00/13] soc: imx: gpcv2: support i.MX8MM Peng Fan (OSS)
2021-05-06 1:04 ` [PATCH V2 05/13] soc: imx: gpcv2: wait for ADB400 handshake Peng Fan (OSS)
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