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Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=noisy.programming.kicks-ass.net) by casper.infradead.org with esmtpsa (Exim 4.92.3 #3 (Red Hat Linux)) id 1kg7tg-00005F-Dg; Fri, 20 Nov 2020 15:00:24 +0000 Received: from hirez.programming.kicks-ass.net (hirez.programming.kicks-ass.net [192.168.1.225]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by noisy.programming.kicks-ass.net (Postfix) with ESMTPS id CB369304D28; Fri, 20 Nov 2020 16:00:23 +0100 (CET) Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id A770C20244762; Fri, 20 Nov 2020 16:00:23 +0100 (CET) Date: Fri, 20 Nov 2020 16:00:23 +0100 From: Peter Zijlstra To: Will Deacon Subject: Re: [PATCH 4/6] mm: proc: Invalidate TLB after clearing soft-dirty page state Message-ID: <20201120150023.GH3040@hirez.programming.kicks-ass.net> References: <20201120143557.6715-1-will@kernel.org> <20201120143557.6715-5-will@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20201120143557.6715-5-will@kernel.org> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yu Zhao , Anshuman Khandual , Catalin Marinas , Linus Torvalds , linux-kernel@vger.kernel.org, linux-mm@kvack.org, Minchan Kim , kernel-team@android.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Nov 20, 2020 at 02:35:55PM +0000, Will Deacon wrote: > Since commit 0758cd830494 ("asm-generic/tlb: avoid potential double flush"), > TLB invalidation is elided in tlb_finish_mmu() if no entries were batched > via the tlb_remove_*() functions. Consequently, the page-table modifications > performed by clear_refs_write() in response to a write to > /proc//clear_refs do not perform TLB invalidation. Although this is > fine when simply aging the ptes, in the case of clearing the "soft-dirty" > state we can end up with entries where pte_write() is false, yet a > writable mapping remains in the TLB. > > Fix this by calling tlb_remove_tlb_entry() for each entry being > write-protected when cleating soft-dirty. > > @@ -1053,6 +1054,7 @@ static inline void clear_soft_dirty(struct vm_area_struct *vma, > ptent = pte_wrprotect(old_pte); > ptent = pte_clear_soft_dirty(ptent); > ptep_modify_prot_commit(vma, addr, pte, old_pte, ptent); > + tlb_remove_tlb_entry(tlb, pte, addr); > } else if (is_swap_pte(ptent)) { > ptent = pte_swp_clear_soft_dirty(ptent); > set_pte_at(vma->vm_mm, addr, pte, ptent); Oh! Yesterday when you had me look at this code; I figured the sane thing to do was to make it look more like mprotect(). Why did you chose to make it work with mmu_gather instead? I'll grant you that it's probably the smaller patch, but I still think it's weird to use mmu_gather here. Also, is tlb_remote_tlb_entry() actually correct? If you look at __tlb_remove_tlb_entry() you'll find that Power-Hash-32 will clear the entry, which might not be what we want here, we want to update the entrty. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel