From: Icenowy Zheng <icenowy@aosc.io>
To: Maxime Ripard <mripard@kernel.org>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@siol.net>
Cc: devicetree@vger.kernel.org, linux-sunxi@googlegroups.com,
inux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
Icenowy Zheng <icenowy@aosc.io>
Subject: [PATCH 1/3] ARM: dts: sun8i: v3s: add EHCI/OHCI0 device nodes
Date: Sun, 22 Nov 2020 08:38:39 +0800 [thread overview]
Message-ID: <20201122003841.1957034-2-icenowy@aosc.io> (raw)
In-Reply-To: <20201122003841.1957034-1-icenowy@aosc.io>
The USB PHY 0 on V3s SoC can also be routed to a pair of EHCI/OHCI
controllers.
Add the device nodes for the controllers.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
---
arch/arm/boot/dts/sun8i-v3s.dtsi | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-v3s.dtsi b/arch/arm/boot/dts/sun8i-v3s.dtsi
index 7b2d684aeb97..3e7e99745b73 100644
--- a/arch/arm/boot/dts/sun8i-v3s.dtsi
+++ b/arch/arm/boot/dts/sun8i-v3s.dtsi
@@ -297,6 +297,25 @@ usbphy: phy@1c19400 {
#phy-cells = <1>;
};
+ ehci0: usb@1c1a000 {
+ compatible = "allwinner,sun8i-v3s-ehci", "generic-ehci";
+ reg = <0x01c1a000 0x100>;
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
+ status = "disabled";
+ };
+
+ ohci0: usb@1c1a400 {
+ compatible = "allwinner,sun8i-v3s-ohci", "generic-ohci";
+ reg = <0x01c1a400 0x100>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_EHCI0>, <&ccu CLK_BUS_OHCI0>,
+ <&ccu CLK_USB_OHCI0>;
+ resets = <&ccu RST_BUS_EHCI0>, <&ccu RST_BUS_OHCI0>;
+ status = "disabled";
+ };
+
ccu: clock@1c20000 {
compatible = "allwinner,sun8i-v3s-ccu";
reg = <0x01c20000 0x400>;
--
2.28.0
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next prev parent reply other threads:[~2020-11-22 0:40 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-22 0:38 [PATCH 0/3] ARM: dts: sun8i: v3s: enable EHCI/OHCI Icenowy Zheng
2020-11-22 0:38 ` Icenowy Zheng [this message]
2020-11-23 3:38 ` [linux-sunxi] [PATCH 1/3] ARM: dts: sun8i: v3s: add EHCI/OHCI0 device nodes Chen-Yu Tsai
2020-11-22 0:40 ` [PATCH 2/3] ARM: dts: sun8i: v3s: enable EHCI/OHCI for Lichee Pi Zero Icenowy Zheng
2020-11-23 3:37 ` [linux-sunxi] " Chen-Yu Tsai
2020-11-23 10:21 ` Icenowy Zheng
2020-11-28 3:09 ` Chen-Yu Tsai
2020-11-28 3:35 ` Icenowy Zheng
2020-11-22 0:40 ` [PATCH 3/3] ARM: dts: sun8i: s3: switch PineCube to use OHCI/EHCI only Icenowy Zheng
2020-11-23 3:29 ` [linux-sunxi] " Chen-Yu Tsai
2020-11-23 11:43 ` Maxime Ripard
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