From: Erwan Le Ray <erwan.leray@foss.st.com>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jslaby@suse.com>,
Maxime Coquelin <mcoquelin.stm32@gmail.com>,
Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Valentin Caron <valentin.caron@foss.st.com>,
Erwan Le Ray <erwan.leray@foss.st.com>,
linux-kernel@vger.kernel.org,
Fabrice Gasnier <fabrice.gasnier@foss.st.com>,
linux-serial@vger.kernel.org,
linux-stm32@st-md-mailman.stormreply.com,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH 04/13] serial: stm32: fix TX and RX FIFO thresholds
Date: Fri, 19 Feb 2021 18:47:27 +0100 [thread overview]
Message-ID: <20210219174736.1022-5-erwan.leray@foss.st.com> (raw)
In-Reply-To: <20210219174736.1022-1-erwan.leray@foss.st.com>
TX and RX FIFO thresholds may be cleared after suspend/resume, depending
on the low power mode.
Those configurations (done in startup) are not effective for UART console,
as:
- the reference manual indicates that FIFOEN bit can only be written when
the USART is disabled (UE=0)
- a set_termios (where UE is set) is requested firstly for console
enabling, before the startup.
Fixes: 84872dc448fe ("serial: stm32: add RX and TX FIFO flush")
Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
diff --git a/drivers/tty/serial/stm32-usart.c b/drivers/tty/serial/stm32-usart.c
index 7710de947aa3..d409a23806b1 100644
--- a/drivers/tty/serial/stm32-usart.c
+++ b/drivers/tty/serial/stm32-usart.c
@@ -649,19 +649,8 @@ static int stm32_usart_startup(struct uart_port *port)
if (ofs->rqr != UNDEF_REG)
stm32_usart_set_bits(port, ofs->rqr, USART_RQR_RXFRQ);
- /* Tx and RX FIFO configuration */
- if (stm32_port->fifoen) {
- val = readl_relaxed(port->membase + ofs->cr3);
- val &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK);
- val |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT;
- val |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT;
- writel_relaxed(val, port->membase + ofs->cr3);
- }
-
- /* RX FIFO enabling */
+ /* RX enabling */
val = stm32_port->cr1_irq | USART_CR1_RE | BIT(cfg->uart_enable_bit);
- if (stm32_port->fifoen)
- val |= USART_CR1_FIFOEN;
stm32_usart_set_bits(port, ofs->cr1, val);
return 0;
@@ -770,9 +759,15 @@ static void stm32_usart_set_termios(struct uart_port *port,
if (stm32_port->fifoen)
cr1 |= USART_CR1_FIFOEN;
cr2 = 0;
+
+ /* Tx and RX FIFO configuration */
cr3 = readl_relaxed(port->membase + ofs->cr3);
- cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTCFG_MASK | USART_CR3_RXFTIE
- | USART_CR3_TXFTCFG_MASK;
+ cr3 &= USART_CR3_TXFTIE | USART_CR3_RXFTIE;
+ if (stm32_port->fifoen) {
+ cr3 &= ~(USART_CR3_TXFTCFG_MASK | USART_CR3_RXFTCFG_MASK);
+ cr3 |= USART_CR3_TXFTCFG_HALF << USART_CR3_TXFTCFG_SHIFT;
+ cr3 |= USART_CR3_RXFTCFG_HALF << USART_CR3_RXFTCFG_SHIFT;
+ }
if (cflag & CSTOPB)
cr2 |= USART_CR2_STOP_2B;
--
2.17.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-02-19 17:51 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-19 17:47 [PATCH 00/13] stm32 usart various fixes Erwan Le Ray
2021-02-19 17:47 ` [PATCH 01/13] serial: stm32: fix probe and remove order for dma Erwan Le Ray
2021-02-19 17:47 ` [PATCH 02/13] serial: stm32: fix startup by enabling usart for reception Erwan Le Ray
2021-02-19 17:47 ` [PATCH 03/13] serial: stm32: fix incorrect characters on console Erwan Le Ray
2021-02-19 17:47 ` Erwan Le Ray [this message]
2021-02-19 17:47 ` [PATCH 05/13] serial: stm32: fix a deadlock condition with wakeup event Erwan Le Ray
2021-02-19 17:47 ` [PATCH 06/13] serial: stm32: fix wake-up flag handling Erwan Le Ray
2021-02-19 17:47 ` [PATCH 07/13] serial: stm32: fix a deadlock in set_termios Erwan Le Ray
2021-02-19 17:47 ` [PATCH 08/13] serial: stm32: fix tx dma completion, release channel Erwan Le Ray
2021-02-19 17:47 ` [PATCH 09/13] serial: stm32: call stm32_transmit_chars locked Erwan Le Ray
2021-02-19 17:47 ` [PATCH 10/13] serial: stm32: fix FIFO flush in startup and set_termios Erwan Le Ray
2021-02-19 17:47 ` [PATCH 11/13] serial: stm32: add FIFO flush when port is closed Erwan Le Ray
2021-02-19 17:47 ` [PATCH 12/13] serial: stm32: fix tx_empty condition Erwan Le Ray
2021-02-19 17:47 ` [PATCH 13/13] serial: stm32: add support for "flush_buffer" ops Erwan Le Ray
2021-03-03 19:31 ` [PATCH 00/13] stm32 usart various fixes Greg Kroah-Hartman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20210219174736.1022-5-erwan.leray@foss.st.com \
--to=erwan.leray@foss.st.com \
--cc=alexandre.torgue@foss.st.com \
--cc=fabrice.gasnier@foss.st.com \
--cc=gregkh@linuxfoundation.org \
--cc=jslaby@suse.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-serial@vger.kernel.org \
--cc=linux-stm32@st-md-mailman.stormreply.com \
--cc=mcoquelin.stm32@gmail.com \
--cc=valentin.caron@foss.st.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).