From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D8BBDC433E0 for ; Mon, 8 Mar 2021 13:32:41 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 702E8651C2 for ; Mon, 8 Mar 2021 13:32:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 702E8651C2 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=zYV3INeS6fKtrkrWaA4K4bSszTVdJhnxzRaVuU54Abo=; b=gh/zRS7zJ2JssFBkI5aXo5dgK I+m+aZRo8+Nqz9z5PXb1irdK5WBKIjVktrZnsOymLlVdtEgTt+wgNmIwPteVxDW1SaDlDvStzlwI8 IZCQbolwP5JP/J4AXKzByhyQHpYPuHUZocScWCkJHzhSctloh0iw7OUP0Px9MjfJU+Caok/vwLwuE GxGqC+hlvRscRdXsJLksW8yrSj2o9apw69H3nKoVhpH4JJfKUv2lMdItHAkCClG4FC4w6bV3j4bUj 6mQooYMXlqm/JAJg3Kw6cyIMUHecv2AObdhwvPpUJt4V+O1+ryMyJwE+CpQLr0Itua6CdVmtdb+RQ /jkupCKdg==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJFyV-00HSiB-KR; Mon, 08 Mar 2021 13:31:07 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lJFyO-00HSf6-80 for linux-arm-kernel@lists.infradead.org; Mon, 08 Mar 2021 13:31:04 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id EA44964DA3; Mon, 8 Mar 2021 13:30:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1615210258; bh=pEXNet6N/egXd7wBXv+XZqh8Z0VGXmL8Y0GWpDXYgSU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cKyWPlExbizCNVfKpN0ou+bCV20Y4lb3vpBkQS2Vmo3MZrrlJQh/iUsAO0JLf7oom Aflt8QGqmFYVUY8Zoiag1rK2aK5nf7xwG+EThpUDEqEjn6MScpRvXvHbMLGDeywvrw WWiK5i+VSUsi8FHgLgoDTguaw2tETYur8CDLJvxvop3CT1bE01EW2xjxsh8OQ4qdXj GwOH4MfOsamqJ4lC32GoG/POx0M8kDUF82rFM3HPT6hBlwnQ+glrbXy0A7BO3OfZGU 4cUoYzdmvTf2bToG82yD3eHRe2YFbLqF1oklALbm0QeZuNe7ARB0QrZ1vjAHnhVRDX 9nL4V2qDnHBug== Date: Mon, 8 Mar 2021 13:30:53 +0000 From: Will Deacon To: Anshuman Khandual Cc: Mark Rutland , linux-arm-kernel@lists.infradead.org, James Morse , Catalin Marinas , Marc Zyngier , Suzuki K Poulose , Ard Biesheuvel , kvmarm@lists.cs.columbia.edu, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64/mm: Fix __enable_mmu() for new TGRAN range values Message-ID: <20210308133053.GA26128@willie-the-truck> References: <1614954969-14338-1-git-send-email-anshuman.khandual@arm.com> <20210305145111.GA78884@C02TD0UTHF1T.local> <1f339512-34ac-9779-e534-bee6698b99aa@arm.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1f339512-34ac-9779-e534-bee6698b99aa@arm.com> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210308_133102_599669_17EF6796 X-CRM114-Status: GOOD ( 23.92 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Mar 07, 2021 at 05:24:21PM +0530, Anshuman Khandual wrote: > > > On 3/5/21 8:21 PM, Mark Rutland wrote: > > On Fri, Mar 05, 2021 at 08:06:09PM +0530, Anshuman Khandual wrote: > >> From: James Morse > >> > >> As per ARM ARM DDI 0487G.a, when FEAT_LPA2 is implemented, ID_AA64MMFR0_EL1 > >> might contain a range of values to describe supported translation granules > >> (4K and 16K pages sizes in particular) instead of just enabled or disabled > >> values. This changes __enable_mmu() function to handle complete acceptable > >> range of values (depending on whether the field is signed or unsigned) now > >> represented with ID_AA64MMFR0_TGRAN_SUPPORTED_[MIN..MAX] pair. While here, > >> also fix similar situations in EFI stub and KVM as well. > >> > >> Cc: Catalin Marinas > >> Cc: Will Deacon > >> Cc: Marc Zyngier > >> Cc: James Morse > >> Cc: Suzuki K Poulose > >> Cc: Ard Biesheuvel > >> Cc: Mark Rutland > >> Cc: linux-arm-kernel@lists.infradead.org > >> Cc: kvmarm@lists.cs.columbia.edu > >> Cc: linux-efi@vger.kernel.org > >> Cc: linux-kernel@vger.kernel.org > >> Signed-off-by: James Morse > >> Signed-off-by: Anshuman Khandual > >> --- > >> arch/arm64/include/asm/sysreg.h | 20 ++++++++++++++------ > >> arch/arm64/kernel/head.S | 6 ++++-- > >> arch/arm64/kvm/reset.c | 23 ++++++++++++----------- > >> drivers/firmware/efi/libstub/arm64-stub.c | 2 +- > >> 4 files changed, 31 insertions(+), 20 deletions(-) > >> > >> diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h > >> index dfd4edb..d4a5fca9 100644 > >> --- a/arch/arm64/include/asm/sysreg.h > >> +++ b/arch/arm64/include/asm/sysreg.h > >> @@ -796,6 +796,11 @@ > >> #define ID_AA64MMFR0_PARANGE_48 0x5 > >> #define ID_AA64MMFR0_PARANGE_52 0x6 > >> > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT 0x0 > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE 0x1 > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN 0x2 > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MAX 0x7 > > > > The TGRAN2 fields doesn't quite follow the usual ID scheme rules, so how > > do we deteremine the max value? Does the ARM ARM say anything in > > particular about them, like we do for some of the PMU ID fields? > > Did not find anything in ARM ARM, regarding what scheme TGRAN2 fields > actually follow. I had arrived at more restrictive 0x7 value, like the > usual signed fields as the TGRAN4 fields definitely do not follow the > unsigned ID scheme. Would restricting max value to 0x3 (i.e LPA2) be a > better option instead ? I don't think it helps much, as TGRAN64_2 doesn't even define 0x3. So I think this patch is probably the best we can do, but the Arm ARM could really do with describing the scheme here. Will _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel