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Mon, 08 Mar 2021 06:45:09 -0800 Received: from mtkmbs05n1.mediatek.inc (172.21.101.15) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 8 Mar 2021 06:34:46 -0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs05n1.mediatek.inc (172.21.101.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 8 Mar 2021 22:34:24 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 8 Mar 2021 22:34:24 +0800 From: Mark-PK Tsai To: , Mark-PK Tsai CC: , , , , , , , Subject: Re: [PATCH] irqchip/irq-mst: Support polarity configuration Date: Mon, 8 Mar 2021 22:31:10 +0800 Message-ID: <20210308143109.24644-1-mark-pk.tsai@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <01b1c85119619c2418908a2fdabfb5dc@kernel.org> References: <01b1c85119619c2418908a2fdabfb5dc@kernel.org> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210308_144516_959944_0EA0DAC3 X-CRM114-Status: GOOD ( 14.47 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Marc Zyngier >On 2021-03-08 03:01, Mark-PK Tsai wrote: >> From: Marc Zyngier >> >>> > >>> > Support irq polarity configuration and save and restore the config >>> > when system suspend and resume. >>> > >>> > Signed-off-by: Mark-PK Tsai >>> > --- >>> > drivers/irqchip/irq-mst-intc.c | 87 ++++++++++++++++++++++++++++++++-- >>> > 1 file changed, 84 insertions(+), 3 deletions(-) >>> > >>> > diff --git a/drivers/irqchip/irq-mst-intc.c b/drivers/irqchip/irq-mst-intc.c >>> > index 143657b0cf28..979a4d55bcb1 100644 >>> > --- a/drivers/irqchip/irq-mst-intc.c >>> > +++ b/drivers/irqchip/irq-mst-intc.c >>> > @@ -13,15 +13,25 @@ >>> > #include >>> > #include >>> > #include >>> > +#include >>> > >>> > -#define INTC_MASK 0x0 >>> > -#define INTC_EOI 0x20 >>> > +#define INTC_MASK 0x0 >>> > +#define INTC_REV_POLARITY 0x10 >>> > +#define INTC_EOI 0x20 >>> > + >>> > +#ifdef CONFIG_PM_SLEEP >>> > +static LIST_HEAD(mst_intc_list); >>> > +#endif >>> > >>> > struct mst_intc_chip_data { >>> > raw_spinlock_t lock; >>> > unsigned int irq_start, nr_irqs; >>> > void __iomem *base; >>> > bool no_eoi; >>> > +#ifdef CONFIG_PM_SLEEP >>> > + struct list_head entry; >>> > + u16 saved_polarity_conf[DIV_ROUND_UP(64, 16)]; >>> >>> Where is this 64 coming from? >> >> The maximum number of interrupts a mst-intc supports is 64 in >> Mstar and Mediatek SoCs now. >> So I just use the maximum number of interrupts here. > >Then please use a named constant instead of a magic number. > Okay, I will update in patch v3. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel