From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.0 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5B4DFC433E0 for ; Mon, 8 Mar 2021 15:05:29 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E77F565215 for ; Mon, 8 Mar 2021 15:05:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E77F565215 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=cyfDUngfRjZh9Fvsofna+pdc1CUIqTy9g44EcPbPnEI=; b=khmaYcaS+XARyOQ9InffwbgDa buJI1a6l90/v+zmQWy5iZGodTJzh+lWyMu7N4yswB+iS+Or+u02SSyD6vqNn9ZsmgTlSGiwYGJitL TbSL3Ua3IA6t6Jp/xU64bvT+o151VD/EMaIqT5t7wM2ZvpOrCckmhjcSCnms5HsgoKliE/X1KIFkZ Wa4nhe/CSxbd7JZ47mjbsA1hBu0FEvQXwWHNJd28FXf/pre/zKrZVh4JbmX0D/Au43UbNLen5awkk ThmayTYlLr73n3vYm6Io3xPvplCOzfngRj12i9tjUvhqYBzafrtGqbVXVEQUQGAUz95Y5YlYkhUsa 8NlRtMJfw==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJHQ9-000PWW-7D; Mon, 08 Mar 2021 15:03:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lJHPy-000PUi-On for linux-arm-kernel@lists.infradead.org; Mon, 08 Mar 2021 15:03:37 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A77431B; Mon, 8 Mar 2021 07:03:33 -0800 (PST) Received: from C02TD0UTHF1T.local (unknown [10.57.51.12]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 918373F73C; Mon, 8 Mar 2021 07:03:30 -0800 (PST) Date: Mon, 8 Mar 2021 15:03:20 +0000 From: Mark Rutland To: Will Deacon Cc: Anshuman Khandual , linux-arm-kernel@lists.infradead.org, James Morse , Catalin Marinas , Marc Zyngier , Suzuki K Poulose , Ard Biesheuvel , kvmarm@lists.cs.columbia.edu, linux-efi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH] arm64/mm: Fix __enable_mmu() for new TGRAN range values Message-ID: <20210308150232.GA14159@C02TD0UTHF1T.local> References: <1614954969-14338-1-git-send-email-anshuman.khandual@arm.com> <20210305145111.GA78884@C02TD0UTHF1T.local> <1f339512-34ac-9779-e534-bee6698b99aa@arm.com> <20210308133053.GA26128@willie-the-truck> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210308133053.GA26128@willie-the-truck> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210308_150335_186166_9A3CFF39 X-CRM114-Status: GOOD ( 20.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Mar 08, 2021 at 01:30:53PM +0000, Will Deacon wrote: > On Sun, Mar 07, 2021 at 05:24:21PM +0530, Anshuman Khandual wrote: > > On 3/5/21 8:21 PM, Mark Rutland wrote: > > > On Fri, Mar 05, 2021 at 08:06:09PM +0530, Anshuman Khandual wrote: > > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_DEFAULT 0x0 > > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_NONE 0x1 > > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MIN 0x2 > > >> +#define ID_AA64MMFR0_TGRAN_2_SUPPORTED_MAX 0x7 > > > > > > The TGRAN2 fields doesn't quite follow the usual ID scheme rules, so how > > > do we deteremine the max value? Does the ARM ARM say anything in > > > particular about them, like we do for some of the PMU ID fields? > > > > Did not find anything in ARM ARM, regarding what scheme TGRAN2 fields > > actually follow. I had arrived at more restrictive 0x7 value, like the > > usual signed fields as the TGRAN4 fields definitely do not follow the > > unsigned ID scheme. Would restricting max value to 0x3 (i.e LPA2) be a > > better option instead ? > > I don't think it helps much, as TGRAN64_2 doesn't even define 0x3. > > So I think this patch is probably the best we can do, but the Arm ARM could > really do with describing the scheme here. I agree, and I've filed a ticket internally to try to get this cleaned up. I suspect that the answer is that these are basically unsigned, with 0x2-0xf indicating presence, but I can't guarantee that. Thanks, Mark. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel