From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED, USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9FBD1C433DB for ; Fri, 26 Mar 2021 11:57:28 +0000 (UTC) Received: from desiato.infradead.org (desiato.infradead.org [90.155.92.199]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2DC6D61585 for ; Fri, 26 Mar 2021 11:57:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2DC6D61585 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=desiato.20200630; h=Sender:Content-Transfer-Encoding :Content-Type:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:References:Message-ID: Subject:Cc:To:From:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=g4JZOhgbL8lEXreLLrTz0LvpuH+ZUZrhGV+lZ1GWr0w=; b=i7SJ5+DE1mgHSJ7Gz3dPBamKA yaMX5AuEvRUAd2BgFwLvcNG3escf6wZh3uH2N1MHpbcciOskMpIoRlHZZdCV74rDhlWnjP54EwqYC 6mfBHeZ8vHSQCi1+mYrxYIS2+sl/NholKQ3y01t/9mblDXjoC4eFYEBNjxliZzUYdij6FML/nQxwo 9DloEmHKMjtadvvzeXqLpEygig7D3Q+5K68XEoNTOIAkJCWShfFq3xuMQEViSSkfo7krQmpv8VYVB 2VFKaDV+GH0+aXUTxS7pKR7uXHmc84JoFKs+4AApQ6UVXVx5FpPPd119RgbxU9NwwF/n9XDTsm0uM Fj32YH3jQ==; Received: from localhost ([::1] helo=desiato.infradead.org) by desiato.infradead.org with esmtp (Exim 4.94 #2 (Red Hat Linux)) id 1lPl4A-003Sj3-VQ; Fri, 26 Mar 2021 11:55:51 +0000 Received: from mail.kernel.org ([198.145.29.99]) by desiato.infradead.org with esmtps (Exim 4.94 #2 (Red Hat Linux)) id 1lPl46-003Sif-As for linux-arm-kernel@lists.infradead.org; Fri, 26 Mar 2021 11:55:48 +0000 Received: by mail.kernel.org (Postfix) with ESMTPSA id 15F0161A36; Fri, 26 Mar 2021 11:55:43 +0000 (UTC) Date: Fri, 26 Mar 2021 11:55:41 +0000 From: Catalin Marinas To: Mark Brown Cc: Will Deacon , linux-arm-kernel@lists.infradead.org, Mark Rutland Subject: Re: [PATCH] arm64: Document requirements for fine grained traps at boot Message-ID: <20210326115541.GC5126@arm.com> References: <20210312154917.23263-1-broonie@kernel.org> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20210312154917.23263-1-broonie@kernel.org> User-Agent: Mutt/1.10.1 (2018-07-13) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210326_115546_723741_39A2FB1E X-CRM114-Status: GOOD ( 21.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, Mar 12, 2021 at 03:49:17PM +0000, Mark Brown wrote: > The arm64 FEAT_FGT extension introduces a set of traps to EL2 for accesses > to small sets of registers and instructions from EL1 and EL0. Currently > Linux makes no use of this feature, explicitly document that it should > be disabled when entering the kernel at EL2 (as is the architectural > default) to help avoid surprises. > > Signed-off-by: Mark Brown > --- > Documentation/arm64/booting.rst | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst > index 7552dbc1cc54..1efc2d3023bb 100644 > --- a/Documentation/arm64/booting.rst > +++ b/Documentation/arm64/booting.rst > @@ -270,6 +270,13 @@ Before jumping into the kernel, the following conditions must be met: > having 0b1 set for the corresponding bit for each of the auxiliary > counters present. > > + For CPUs with Fine Grained Traps (FEAT_FGT) extension present: > + > + - If the kernel is entered at EL2: > + > + - HAFGRTR_EL2, HDFGWTR_EL2, HDFGRTR_EL2, HFGWTR_EL2, HFGRTR_EL2 and > + HFGITR_EL2 must be initialised to 0. While this requirement is correct, documenting such individual registers doesn't scales well. You may run a 5 year old kernel on a newer CPU and we can't predict which control registers have been added and what side-effect they have. The architecture, at least for the above registers, states that if warm reset to EL2, their value is 0. I think the EL3 firmware (which is normally up to date with the CPU it is running on) should follow the ARM ARM reset values. There are probably EL1 registers with similar requirements (I haven't checked). Can we instead have a broad statement regarding any EL1/EL2 registers that they should be either rest to 0 or to the architectural (warm) reset value as per the ARM ARM? Or something like any feature must be disabled by default at the EL1/EL2 control registers level and this would imply the fine-grained traps. We currently have this statement: All writable architected system registers at the exception level where the kernel image will be entered must be initialised by software at a higher exception level to prevent execution in an UNKNOWN state. The "prevent execution in an UNKNOWN state" needs to be clearer. The above should also include exception levels _below_ the one where the kernel is entered. It doesn't help if KVM is old and has no clue of new EL1-specific registers. Adding Mark R, I think he looked at some of these in the past. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel