Re: [PATCH] arm64: Document requirements for fine grained traps at boot

[Catalin Marinas <catalin.marinas@arm.com>]

On Mon, Mar 29, 2021 at 11:31:27AM +0100, Will Deacon wrote:
> On Fri, Mar 26, 2021 at 11:55:41AM +0000, Catalin Marinas wrote:
> > On Fri, Mar 12, 2021 at 03:49:17PM +0000, Mark Brown wrote:
> > > The arm64 FEAT_FGT extension introduces a set of traps to EL2 for accesses
> > > to small sets of registers and instructions from EL1 and EL0.  Currently
> > > Linux makes no use of this feature, explicitly document that it should
> > > be disabled when entering the kernel at EL2 (as is the architectural
> > > default) to help avoid surprises.
> > > 
> > > Signed-off-by: Mark Brown <broonie@kernel.org>
> > > ---
> > >  Documentation/arm64/booting.rst | 7 +++++++
> > >  1 file changed, 7 insertions(+)
> > > 
> > > diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst
> > > index 7552dbc1cc54..1efc2d3023bb 100644
> > > --- a/Documentation/arm64/booting.rst
> > > +++ b/Documentation/arm64/booting.rst
> > > @@ -270,6 +270,13 @@ Before jumping into the kernel, the following conditions must be met:
> > >        having 0b1 set for the corresponding bit for each of the auxiliary
> > >        counters present.
> > >  
> > > +  For CPUs with Fine Grained Traps (FEAT_FGT) extension present:
> > > +
> > > +  - If the kernel is entered at EL2:
> > > +
> > > +    - HAFGRTR_EL2, HDFGWTR_EL2, HDFGRTR_EL2, HFGWTR_EL2, HFGRTR_EL2 and
> > > +      HFGITR_EL2 must be initialised to 0.
> > 
> > While this requirement is correct, documenting such individual registers
> > doesn't scales well. You may run a 5 year old kernel on a newer CPU and
> > we can't predict which control registers have been added and what
> > side-effect they have. The architecture, at least for the above
> > registers, states that if warm reset to EL2, their value is 0. I think
> > the EL3 firmware (which is normally up to date with the CPU it is
> > running on) should follow the ARM ARM reset values. There are probably
> > EL1 registers with similar requirements (I haven't checked).
> 
> One thing I don't understand about the registers listed here is that we're
> requiring firmware to initialise them when the kernel is entered at EL2. But
> they're *_EL2 registers, so why can't the kernel initialise them itself? The
> fewer dependencies on firmware, the better.

W.r.t. these specific registers, you are right, we'd better initialise
them in the kernel rather than documenting. But in the general case,
there may be new registers an old kernel is not aware of. Here we expect
at least the EL3 firmware to be up to date with the CPU it is running
on, hence a broad statement that such registers need to be initialised
(unless we have one already).

-- 
Catalin

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