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From: Will Deacon <will@kernel.org>
To: Ard Biesheuvel <ardb@kernel.org>
Cc: linux-crypto@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	Dave Martin <dave.martin@arm.com>,
	Mark Brown <broonie@kernel.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Eric Biggers <ebiggers@kernel.org>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Peter Zijlstra <peterz@infradead.org>,
	Sebastian Andrzej Siewior <bigeasy@linutronix.de>,
	Ingo Molnar <mingo@kernel.org>, Andy Lutomirski <luto@kernel.org>
Subject: Re: [PATCH v2 2/9] arm64: assembler: introduce wxN aliases for wN registers
Date: Tue, 30 Mar 2021 10:59:42 +0100
Message-ID: <20210330095941.GB5352@willie-the-truck> (raw)
In-Reply-To: <20210302090118.30666-3-ardb@kernel.org>

On Tue, Mar 02, 2021 at 10:01:11AM +0100, Ard Biesheuvel wrote:
> The AArch64 asm syntax has this slightly tedious property that the names
> used in mnemonics to refer to registers depend on whether the opcode in
> question targets the entire 64-bits (xN), or only the least significant
> 8, 16 or 32 bits (wN). When writing parameterized code such as macros,
> this can be annoying, as macro arguments don't lend themselves to
> indexed lookups, and so generating a reference to wN in a macro that
> receives xN as an argument is problematic.
> 
> For instance, an upcoming patch that modifies the implementation of the
> cond_yield macro to be able to refer to 32-bit registers would need to
> modify invocations such as
> 
>   cond_yield	3f, x8
> 
> to
> 
>   cond_yield	3f, 8
> 
> so that the second argument can be token pasted after x or w to emit the
> correct register reference. Unfortunately, this interferes with the self
> documenting nature of the first example, where the second argument is
> obviously a register, whereas in the second example, one would need to
> go and look at the code to find out what '8' means.
> 
> So let's fix this by defining wxN aliases for all xN registers, which
> resolve to the 32-bit alias of each respective 64-bit register. This
> allows the macro implementation to paste the xN reference after a w to
> obtain the correct register name.
> 
> Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
> ---
>  arch/arm64/include/asm/assembler.h | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
> index e0fc1d424f9b..7b076ccd1a54 100644
> --- a/arch/arm64/include/asm/assembler.h
> +++ b/arch/arm64/include/asm/assembler.h
> @@ -23,6 +23,14 @@
>  #include <asm/ptrace.h>
>  #include <asm/thread_info.h>
>  
> +	/*
> +	 * Provide a wxN alias for each wN register so what we can paste a xN
> +	 * reference after a 'w' to obtain the 32-bit version.
> +	 */
> +	.irp	n,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30
> +	wx\n	.req	w\n
> +	.endr

That's a pretty neat hack! I remember seeing code elsewhere which would
benefit from this, so might be worth a look at our other macros as I'm sure
I got annoyed by one the other day... ah yes, the SVE macros in fpsimdmacros.h

Acked-by: Will Deacon <will@kernel.org>

Will

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Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-02  9:01 [PATCH v2 0/9] running kernel mode SIMD with softirqs disabled Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 1/9] arm64: assembler: remove conditional NEON yield macros Ard Biesheuvel
2021-03-30  9:52   ` Will Deacon
2021-04-12  8:39     ` Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 2/9] arm64: assembler: introduce wxN aliases for wN registers Ard Biesheuvel
2021-03-30  9:59   ` Will Deacon [this message]
2021-03-02  9:01 ` [PATCH v2 3/9] arm64: fpsimd: run kernel mode NEON with softirqs disabled Ard Biesheuvel
2021-03-30 10:36   ` Will Deacon
2021-03-02  9:01 ` [PATCH v2 4/9] crypto: aead - disallow en/decrypt for non-task or non-softirq context Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 5/9] crypto: skcipher " Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 6/9] crypto: arm64/gcm-aes-ce - remove non-SIMD fallback path Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 7/9] crypto: arm64/aes-ccm " Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 8/9] crypto: arm64/aes-ce - stop using SIMD helper for skciphers Ard Biesheuvel
2021-03-02  9:01 ` [PATCH v2 9/9] crypto: arm64/aes-neonbs " Ard Biesheuvel
2021-04-12 13:11 ` (subset) [PATCH v2 0/9] running kernel mode SIMD with softirqs disabled Catalin Marinas

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